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Searched refs:ratio (Results 1 – 15 of 15) sorted by relevance

/arch/x86/platform/intel-mid/
Dmfld.c33 u32 lo, hi, ratio, fsb; in mfld_calibrate_tsc() local
37 ratio = (hi >> 8) & 0x1f; in mfld_calibrate_tsc()
38 pr_debug("ratio is %d\n", ratio); in mfld_calibrate_tsc()
39 if (!ratio) { in mfld_calibrate_tsc()
42 ratio = 16; in mfld_calibrate_tsc()
49 fast_calibrate = ratio * fsb; in mfld_calibrate_tsc()
Dmrfl.c22 u32 lo, hi, ratio, fsb, bus_freq; in tangier_calibrate_tsc() local
32 ratio = (lo >> 8) & 0xFF; in tangier_calibrate_tsc()
33 pr_debug("ratio is %d\n", ratio); in tangier_calibrate_tsc()
34 if (!ratio) { in tangier_calibrate_tsc()
36 ratio = 4; in tangier_calibrate_tsc()
70 fast_calibrate = ratio * fsb; in tangier_calibrate_tsc()
/arch/x86/kernel/
Dtsc_msr.c85 u32 lo, hi, ratio, freq_id, freq; in try_msr_calibrate_tsc() local
95 ratio = (lo >> 8) & 0xff; in try_msr_calibrate_tsc()
98 ratio = (hi >> 8) & 0x1f; in try_msr_calibrate_tsc()
100 pr_info("Maximum core-clock to bus-clock ratio: 0x%x\n", ratio); in try_msr_calibrate_tsc()
102 if (!ratio) in try_msr_calibrate_tsc()
115 res = freq * ratio; in try_msr_calibrate_tsc()
/arch/arm/mach-iop13xx/include/mach/
Dtime.h54 unsigned long ratio = __raw_readl(IOP13XX_PROCESSOR_FREQ); in iop13xx_xsi_bus_ratio() local
55 ratio &= IOP13XX_XSI_FREQ_RATIO_MASK; in iop13xx_xsi_bus_ratio()
56 switch (ratio) { in iop13xx_xsi_bus_ratio()
/arch/arm/mach-davinci/
Dclock.c326 unsigned ratio = 0; in davinci_set_sysclk_rate() local
359 ratio = DIV_ROUND_CLOSEST(input, rate); in davinci_set_sysclk_rate()
360 if (input / ratio > clk->maxrate) in davinci_set_sysclk_rate()
361 ratio = 0; in davinci_set_sysclk_rate()
364 if (ratio == 0) in davinci_set_sysclk_rate()
365 ratio = DIV_ROUND_UP(input, rate); in davinci_set_sysclk_rate()
367 ratio--; in davinci_set_sysclk_rate()
370 if (ratio > pll->div_ratio_mask) in davinci_set_sysclk_rate()
379 v |= ratio | PLLDIV_EN; in davinci_set_sysclk_rate()
/arch/s390/kernel/
Dperf_cpum_sf.c458 static unsigned long compute_sfb_extent(unsigned long ratio, unsigned long base) in compute_sfb_extent() argument
465 if (ratio <= 5) in compute_sfb_extent()
467 if (ratio <= 25) in compute_sfb_extent()
469 if (ratio <= 50) in compute_sfb_extent()
471 if (ratio <= 75) in compute_sfb_extent()
473 if (ratio <= 100) in compute_sfb_extent()
475 if (ratio <= 250) in compute_sfb_extent()
484 unsigned long ratio, num; in sfb_account_overflows() local
496 ratio = DIV_ROUND_UP(100 * OVERFLOW_REG(hwc) * cpuhw->sfb.num_sdb, in sfb_account_overflows()
500 num = compute_sfb_extent(ratio, cpuhw->sfb.num_sdb); in sfb_account_overflows()
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/arch/ia64/kvm/
Dkvm_fw.c201 struct pal_freq_ratio *ratio; in sn2_patch_itc_freq_ratios() local
206 ratio = (struct pal_freq_ratio *)&result->v2; in sn2_patch_itc_freq_ratios()
210 ratio->num = 3; in sn2_patch_itc_freq_ratios()
211 ratio->den = factor; in sn2_patch_itc_freq_ratios()
/arch/ia64/include/asm/uv/
Duv_mmrs.h727 unsigned long ratio : 3; /* RW */ member
/arch/x86/kvm/
Dsvm.c212 static u64 __scale_tsc(u64 ratio, u64 tsc);
969 static u64 __scale_tsc(u64 ratio, u64 tsc) in __scale_tsc() argument
973 mult = ratio >> 32; in __scale_tsc()
974 frac = ratio & ((1ULL << 32) - 1); in __scale_tsc()
998 u64 ratio; in svm_set_tsc_khz() local
1020 ratio = khz << 32; in svm_set_tsc_khz()
1021 do_div(ratio, tsc_khz); in svm_set_tsc_khz()
1023 if (ratio == 0 || ratio & TSC_RATIO_RSVD) { in svm_set_tsc_khz()
1028 svm->tsc_ratio = ratio; in svm_set_tsc_khz()
/arch/m32r/platforms/m32700ut/
Ddot.gdbinit_300MHz_32MB22 # and switch off PLL, before resetting the clock gear ratio.
Ddot.gdbinit_200MHz_16MB22 # and switch off PLL, before resetting the clock gear ratio.
Ddot.gdbinit_400MHz_32MB22 # and switch off PLL, before resetting the clock gear ratio.
/arch/powerpc/boot/dts/
Dvirtex440-ml510.dts238 xlnx,bus2core-clk-ratio = <0x1>;
324 xlnx,sck-ratio = <0x80>;
Dvirtex440-ml507.dts269 xlnx,bus2core-clk-ratio = <1>;
/arch/microblaze/boot/dts/
Dsystem.dts230 xlnx,bus2core-clk-ratio = <0x1>;