Home
last modified time | relevance | path

Searched refs:v3 (Results 1 – 25 of 26) sorted by relevance

12

/drivers/char/mwave/
Dmwavedd.h89 #define PRINTK_4(f,s,v1,v2,v3) \ argument
91 printk(s,v1,v2,v3); \
94 #define PRINTK_5(f,s,v1,v2,v3,v4) \ argument
96 printk(s,v1,v2,v3,v4); \
99 #define PRINTK_6(f,s,v1,v2,v3,v4,v5) \ argument
101 printk(s,v1,v2,v3,v4,v5); \
104 #define PRINTK_7(f,s,v1,v2,v3,v4,v5,v6) \ argument
106 printk(s,v1,v2,v3,v4,v5,v6); \
109 #define PRINTK_8(f,s,v1,v2,v3,v4,v5,v6,v7) \ argument
111 printk(s,v1,v2,v3,v4,v5,v6,v7); \
[all …]
/drivers/clocksource/
Dacpi_pm.c43 u32 v1 = 0, v2 = 0, v3 = 0; in acpi_pm_read_verified() local
54 v3 = read_pmtmr(); in acpi_pm_read_verified()
55 } while (unlikely((v1 > v2 && v1 < v3) || (v2 > v3 && v2 < v1) in acpi_pm_read_verified()
56 || (v3 > v1 && v3 < v2))); in acpi_pm_read_verified()
Dsh_cmt.c287 unsigned long v1, v2, v3; in sh_cmt_get_counter() local
297 v3 = sh_cmt_read_cmcnt(ch); in sh_cmt_get_counter()
299 } while (unlikely((o1 != o2) || (v1 > v2 && v1 < v3) in sh_cmt_get_counter()
300 || (v2 > v3 && v2 < v1) || (v3 > v1 && v3 < v2))); in sh_cmt_get_counter()
/drivers/gpu/drm/radeon/
Datombios_encoders.c815 DIG_ENCODER_CONTROL_PARAMETERS_V3 v3; member
869 args.v3.ucPanelMode = panel_mode; in atombios_dig_encoder_setup()
903 args.v3.ucAction = action; in atombios_dig_encoder_setup()
904 args.v3.usPixelClock = cpu_to_le16(radeon_encoder->pixel_clock / 10); in atombios_dig_encoder_setup()
906 args.v3.ucPanelMode = panel_mode; in atombios_dig_encoder_setup()
908 args.v3.ucEncoderMode = atombios_get_encoder_mode(encoder); in atombios_dig_encoder_setup()
910 if (ENCODER_MODE_IS_DP(args.v3.ucEncoderMode)) in atombios_dig_encoder_setup()
911 args.v3.ucLaneNum = dp_lane_count; in atombios_dig_encoder_setup()
913 args.v3.ucLaneNum = 8; in atombios_dig_encoder_setup()
915 args.v3.ucLaneNum = 4; in atombios_dig_encoder_setup()
[all …]
Datombios_crtc.c435 ENABLE_SPREAD_SPECTRUM_ON_PPLL_V3 v3; member
476 args.v3.usSpreadSpectrumAmountFrac = cpu_to_le16(0); in atombios_crtc_program_ss()
477 args.v3.ucSpreadSpectrumType = ss->type & ATOM_SS_CENTRE_SPREAD_MODE_MASK; in atombios_crtc_program_ss()
480 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P1PLL; in atombios_crtc_program_ss()
483 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_P2PLL; in atombios_crtc_program_ss()
486 args.v3.ucSpreadSpectrumType |= ATOM_PPLL_SS_TYPE_V3_DCPLL; in atombios_crtc_program_ss()
491 args.v3.usSpreadSpectrumAmount = cpu_to_le16(ss->amount); in atombios_crtc_program_ss()
492 args.v3.usSpreadSpectrumStep = cpu_to_le16(ss->step); in atombios_crtc_program_ss()
493 args.v3.ucEnable = enable; in atombios_crtc_program_ss()
549 ADJUST_DISPLAY_PLL_PS_ALLOCATION_V3 v3; member
[all …]
Dradeon_atombios.c1479 struct _ATOM_ASIC_SS_ASSIGNMENT_V3 v3; member
1557 if ((ss_assign->v3.ucClockIndication == id) && in radeon_atombios_get_asic_ss_info()
1558 (clock <= le32_to_cpu(ss_assign->v3.ulTargetClockRange))) { in radeon_atombios_get_asic_ss_info()
1560 le16_to_cpu(ss_assign->v3.usSpreadSpectrumPercentage); in radeon_atombios_get_asic_ss_info()
1561 ss->type = ss_assign->v3.ucSpreadSpectrumMode; in radeon_atombios_get_asic_ss_info()
1562 ss->rate = le16_to_cpu(ss_assign->v3.usSpreadRateIn10Hz); in radeon_atombios_get_asic_ss_info()
1563 if (ss_assign->v3.ucSpreadSpectrumMode & in radeon_atombios_get_asic_ss_info()
2777 struct _COMPUTE_MEMORY_ENGINE_PLL_PARAMETERS_V3 v3; member
2833 args.v3.ulClockParams = cpu_to_le32((clock_type << 24) | clock); in radeon_atom_get_clock_dividers()
2837 dividers->post_div = args.v3.ucPostDiv; in radeon_atom_get_clock_dividers()
[all …]
/drivers/net/ethernet/chelsio/cxgb3/
Dmc5.c101 u32 v3) in dbgi_wr_addr3() argument
105 t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_ADDR2, v3); in dbgi_wr_addr3()
109 u32 v3) in dbgi_wr_data3() argument
113 t3_write_reg(adapter, A_MC5_DB_DBGI_REQ_DATA2, v3); in dbgi_wr_data3()
117 u32 *v3) in dbgi_rd_rsp3() argument
121 *v3 = t3_read_reg(adapter, A_MC5_DB_DBGI_RSP_DATA2); in dbgi_rd_rsp3()
/drivers/gpu/ipu-v3/
DMakefile1 obj-$(CONFIG_IMX_IPUV3_CORE) += imx-ipu-v3.o
3 imx-ipu-v3-objs := ipu-common.o ipu-cpmem.o ipu-csi.o ipu-dc.o ipu-di.o \
/drivers/net/wireless/rtl818x/
DKconfig16 Belkin F5D6020 v3
17 Belkin F5D6020 v3
77 (v1 = rt73usb; v3 is rt2070-based,
/drivers/gpu/
DMakefile3 obj-$(CONFIG_IMX_IPUV3_CORE) += ipu-v3/
/drivers/video/fbdev/sis/
Dsis_main.c4313 u8 reg, v1, v2, v3, v4, v5, v6, v7, v8; in sisfb_post_sis300() local
4331 v3 = 0x80; v6 = 0x80; in sisfb_post_sis300()
4343 v3 = bios[rindex++]; in sisfb_post_sis300()
4352 SiS_SetReg(SISSR, 0x2a, v3); in sisfb_post_sis300()
4364 v1 = 0x01; v2 = 0x43; v3 = 0x1e; v4 = 0x2a; in sisfb_post_sis300()
4370 v3 = bios[memtype + 16]; in sisfb_post_sis300()
4378 v3 &= 0xfd; in sisfb_post_sis300()
4381 SiS_SetReg(SISSR, 0x17, v3); in sisfb_post_sis300()
4399 v1 = 0xf6; v2 = 0x0d; v3 = 0x00; in sisfb_post_sis300()
4403 v3 = bios[0xea]; in sisfb_post_sis300()
[all …]
/drivers/video/
DKconfig23 source "drivers/gpu/ipu-v3/Kconfig"
/drivers/net/wireless/b43legacy/
Dphy.c1784 s8 v3; in b43legacy_phy_xmitpower() local
1812 v3 = (s8)((tmp & 0xFF00) >> 8); in b43legacy_phy_xmitpower()
1815 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) { in b43legacy_phy_xmitpower()
1823 v3 = (s8)((tmp & 0xFF00) >> 8); in b43legacy_phy_xmitpower()
1824 if (v0 == 0x7F || v1 == 0x7F || v2 == 0x7F || v3 == 0x7F) in b43legacy_phy_xmitpower()
1829 v3 = (v3 + 0x20) & 0x3F; in b43legacy_phy_xmitpower()
1834 average = (v0 + v1 + v2 + v3 + 2) / 4; in b43legacy_phy_xmitpower()
Dmain.c439 u16 v3; in b43legacy_tsf_read() local
445 v3 = b43legacy_read16(dev, B43legacy_MMIO_TSF_3); in b43legacy_tsf_read()
453 } while (v3 != test3 || v2 != test2 || v1 != test1); in b43legacy_tsf_read()
455 *tsf = v3; in b43legacy_tsf_read()
507 u16 v3 = (tsf & 0xFFFF000000000000ULL) >> 48; in b43legacy_tsf_write_locked() local
511 b43legacy_write16(dev, B43legacy_MMIO_TSF_3, v3); in b43legacy_tsf_write_locked()
/drivers/staging/rtl8188eu/hal/
Dbb_cfg.c583 u32 v3 = array[i+2]; in config_bb_with_pgheader() local
586 rtl_addr_delay(adapt, v1, v2, v3); in config_bb_with_pgheader()
/drivers/irqchip/
DMakefile22 obj-$(CONFIG_ARM_GIC_V3) += irq-gic-v3.o irq-gic-common.o
/drivers/spi/
DMakefile22 obj-$(CONFIG_SPI_ADI_V3) += spi-adi-v3.o
DKconfig96 tristate "SPI controller v3 for ADI"
99 This is the SPI controller v3 master driver
/drivers/net/wireless/rtlwifi/rtl8188ee/
Dphy.c673 u32 v1 = 0, v2 = 0, v3 = 0; in phy_config_bb_with_pghdr() local
682 v3 = phy_reg_page[i+2]; in phy_config_bb_with_pghdr()
713 v3 = phy_reg_page[i+2]; in phy_config_bb_with_pghdr()
719 v3 = phy_reg_page[i+2]; in phy_config_bb_with_pghdr()
/drivers/net/wireless/rtlwifi/rtl8723be/
Dphy.c730 u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; in _rtl8723be_phy_config_bb_with_pgheaderfile() local
739 v3 = phy_regarray_table_pg[i+2]; in _rtl8723be_phy_config_bb_with_pgheaderfile()
750 v1, v2, v3, v4, v5, v6); in _rtl8723be_phy_config_bb_with_pgheaderfile()
/drivers/net/wireless/rtlwifi/rtl8821ae/
Dphy.c1919 u32 v1, v2, v3, v4, v5, v6; in _rtl8821ae_phy_config_bb_with_pgheaderfile() local
1937 v3 = array[i+2]; in _rtl8821ae_phy_config_bb_with_pgheaderfile()
1963 _rtl8821ae_store_tx_power_by_rate(hw, v1, v2, v3, in _rtl8821ae_phy_config_bb_with_pgheaderfile()
1972 v3 = array[i+2]; in _rtl8821ae_phy_config_bb_with_pgheaderfile()
1977 v3 = array[i+2]; in _rtl8821ae_phy_config_bb_with_pgheaderfile()
/drivers/net/wireless/rtlwifi/rtl8192ee/
Dphy.c895 u32 v1 = 0, v2 = 0, v3 = 0, v4 = 0, v5 = 0, v6 = 0; in phy_config_bb_with_pghdrfile() local
904 v3 = phy_regarray_table_pg[i+2]; in phy_config_bb_with_pghdrfile()
910 _rtl92ee_store_tx_power_by_rate(hw, v1, v2, v3, in phy_config_bb_with_pghdrfile()
/drivers/i2c/busses/
DKconfig655 tristate "PKUnity v3 I2C bus support"
659 This driver supports the I2C IP inside the PKUnity-v3 SoC.
/drivers/rtc/
DKconfig1355 tristate "PKUnity v3 RTC support"
1358 This enables support for the RTC in the PKUnity-v3 SoCs.
/drivers/net/wireless/brcm80211/brcmsmac/phy/
Dphy_n.c21350 u16 v0 = 0x211, v1 = 0x222, v2 = 0x144, v3 = 0x188; in wlc_phy_antsel_init() local
21363 1, 0x0C, 16, &v3); in wlc_phy_antsel_init()
21374 1, 0x1C, 16, &v3); in wlc_phy_antsel_init()

12