Searched refs:GPDR (Results 1 – 20 of 20) sorted by relevance
158 GPDR &= ~BADGE4_GPIO_INT_VID; in badge4_init()159 GPDR |= (BADGE4_GPIO_LGP2 | BADGE4_GPIO_LGP3 | in badge4_init()168 GPDR |= (BADGE4_GPIO_SDSDA | BADGE4_GPIO_SDSCL); in badge4_init()172 GPDR |= (BADGE4_GPIO_UART_HS1 | BADGE4_GPIO_UART_HS2); in badge4_init()176 GPDR |= BADGE4_GPIO_MUXSEL0; in badge4_init()179 GPDR &= ~(BADGE4_GPIO_TESTPT_J5 | BADGE4_GPIO_TESTPT_J6); in badge4_init()181 GPDR |= BADGE4_GPIO_TESTPT_J7; in badge4_init()185 GPDR |= BADGE4_GPIO_PCMEN5V; in badge4_init()
112 GPDR |= GPIO_UART_TXD; in pleb_map_io()113 GPDR &= ~GPIO_UART_RXD; in pleb_map_io()124 GPDR |= GPIO_ETH0_EN; /* set to output */ in pleb_map_io()127 GPDR &= ~GPIO_ETH0_IRQ; in pleb_map_io()
61 SAVE(GPDR); in sa11x0_pm_enter()94 RESTORE(GPDR); in sa11x0_pm_enter()
91 GPDR |= GPIO_UART_TXD | SHANNON_GPIO_CODEC_RESET; in shannon_map_io()92 GPDR &= ~GPIO_UART_RXD; in shannon_map_io()
43 GPDR |= GPIO_32_768kHz; in clk_gpio27_enable()50 GPDR &= ~GPIO_32_768kHz; in clk_gpio27_disable()
296 GPDR |= GPIO_GPIO16; in assabet_init()305 GPDR |= GPIO_SSP_TXD | GPIO_SSP_SCLK | GPIO_SSP_SFRM; in assabet_init()313 GPDR |= GPIO_GPIO27; in assabet_init()391 GPDR |= 0x3fc; /* Configure GPIO 9:2 as outputs */ in get_assabet_scr()393 GPDR &= ~(0x3fc); /* Configure GPIO 9:2 as inputs */ in get_assabet_scr()396 GPDR |= 0x3fc; /* restore correct pin direction */ in get_assabet_scr()
139 GPDR |= GPIO_UART_TXD; in lart_map_io()140 GPDR &= ~GPIO_UART_RXD; in lart_map_io()
424 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in sa1110_mb_disable()443 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in sa1110_mb_enable()
38 GPDR |= LED_23; in lart_leds_event()
39 GPDR |= LED_MASK; in hackkit_leds_event()
266 GPDR = (GPDR & ~GPIO_MBREQ) | GPIO_MBGNT; in pci_nanoengine_setup()
41 GPDR |= LED_MASK; in badge4_leds_event()
114 GPDR |= CERF_GPIO_CF_RESET; in cerf_map_io()
213 GPDR |= GPIO_UART_TXD | GPIO_LDD13 | GPIO_LDD15; in simpad_map_io()214 GPDR &= ~GPIO_UART_RXD; in simpad_map_io()
244 GPDR |= GPIO_GPIO20; /* Clear gpio20 pin as input */ in jornada720_init()
304 GPDR = 0; /* Configure all GPIOs as input */ in h3xxx_map_io()
330 GPDR = GPIO_LDD8 | GPIO_LDD9 | GPIO_LDD10 | GPIO_LDD11 | GPIO_LDD12 | in collie_init()
35 #define GPDR(x) __REG2(0x40E00000, BANK_OFF((x) >> 5) + 0x0c) macro77 GPDR(gpio) |= mask; in __mfp_config_gpio()79 GPDR(gpio) &= ~mask; in __mfp_config_gpio()363 (GPDR(i) & GPIO_bit(i))) { in pxa2xx_mfp_suspend()374 saved_gpdr[i] = GPDR(i * 32); in pxa2xx_mfp_suspend()387 GPDR(i) |= GPIO_bit(i); in pxa2xx_mfp_suspend()389 GPDR(i) &= ~GPIO_bit(i); in pxa2xx_mfp_suspend()404 GPDR(i * 32) = saved_gpdr[i]; in pxa2xx_mfp_resume()437 gpdr_lpm[i] = GPDR(i * 32); in pxa2xx_mfp_init()
23 #define GPDR(x) GPIO_REG(BANK_OFF(gpio_to_bank(x)) + 0x0c) macro
1139 #define GPDR __REG(0x90040004) /* GPIO Pin Direction Reg. */ macro