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Searched refs:P_SPORT0_DRPRI (Results 1 – 25 of 26) sorted by relevance

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/arch/blackfin/mach-bf533/include/mach/
Dportmux.h50 #define P_SPORT0_DRPRI (P_DONTCARE) macro
/arch/blackfin/mach-bf561/include/mach/
Dportmux.h69 #define P_SPORT0_DRPRI (P_DONTCARE) macro
/arch/blackfin/mach-bf538/include/mach/
Dportmux.h40 #define P_SPORT0_DRPRI (P_DONTCARE) macro
/arch/blackfin/mach-bf527/include/mach/
Dportmux.h30 #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PF0) | P_FUNCT(1)) macro
42 #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG7) | P_FUNCT(1)) macro
/arch/blackfin/include/asm/
Dportmux.h225 #ifndef P_SPORT0_DRPRI
226 #define P_SPORT0_DRPRI P_UNDEF macro
/arch/blackfin/mach-bf533/boards/
Dblackstamp.c289 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dcm_bf533.c317 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dstamp.c395 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
/arch/blackfin/mach-bf537/include/mach/
Dportmux.h109 #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(PORT_PJ8) | P_FUNCT(0)) macro
/arch/blackfin/mach-bf537/boards/
Dminotaur.c432 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dtcm_bf537.c499 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dcm_bf537u.c497 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dcm_bf537e.c532 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dstamp.c1467 .pin_req = {P_SPORT0_DTPRI, P_SPORT0_TSCLK, P_SPORT0_DRPRI,
2387 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
/arch/blackfin/mach-bf527/boards/
Dezkit.c501 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0, 0},
1028 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dezbrd.c636 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dad7160eval.c625 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dtll6527m.c745 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dcm_bf527.c763 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
/arch/blackfin/mach-bf518/include/mach/
Dportmux.h122 #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PG3) | P_FUNCT(0)) macro
/arch/blackfin/mach-bf518/boards/
Dtcm-bf518.c515 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
Dezbrd.c594 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
/arch/blackfin/mach-bf538/boards/
Dezkit.c302 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
/arch/blackfin/mach-bf548/boards/
Dcm_bf548.c578 P_SPORT0_DRPRI, P_SPORT0_RSCLK, 0
/arch/blackfin/mach-bf548/include/mach/
Dportmux.h59 #define P_SPORT0_DRPRI (P_DEFINED | P_IDENT(GPIO_PC6) | P_FUNCT(0)) macro

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