| /arch/cris/arch-v32/kernel/ |
| D | irq.c | 365 int masked[NBR_REGS]; in crisv32_do_multiple() local
378 masked[i] = REG_RD_INT_VECT(intr_vect, irq_regs[cpu], in crisv32_do_multiple()
383 mask &= ~masked[i]; in crisv32_do_multiple()
387 if ((i == 1) && (masked[0] & TIMER_MASK)) in crisv32_do_multiple()
390 if ((i == 0) && (masked[0] & TIMER_MASK)) in crisv32_do_multiple()
398 if ((i == 1) && (masked[i] & TIMER_MASK)) { in crisv32_do_multiple()
399 masked[i] &= ~TIMER_MASK; in crisv32_do_multiple()
403 if ((i == 0) && (masked[i] & TIMER_MASK)) { in crisv32_do_multiple()
404 masked[i] &= ~TIMER_MASK; in crisv32_do_multiple()
412 masked[0] &= ~IGNORE_MASK; in crisv32_do_multiple()
[all …]
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| /arch/cris/arch-v10/kernel/ |
| D | irq.c | 138 unsigned masked; in do_multiple_IRQ() local
143 mask = masked = *R_VECT_MASK_RD; in do_multiple_IRQ()
169 if (masked & (1 << bit)) { in do_multiple_IRQ()
178 *R_VECT_MASK_SET = (masked | ethmask); in do_multiple_IRQ()
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| /arch/arm/mach-integrator/include/mach/ |
| D | entry-macro.S | 21 ldr \irqstat, [\base, #IRQ_STATUS] @ get masked status
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| /arch/tile/kernel/ |
| D | irq.c | 92 unsigned long masked = __insn_mfspr(SPR_IPI_MASK_K); in tile_dev_intr() local
93 original_irqs = __insn_mfspr(SPR_IPI_EVENT_K) & ~masked; in tile_dev_intr()
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| /arch/arm/mach-h720x/include/mach/ |
| D | entry-macro.S | 20 @ We see unmasked pending ints only, as the masked pending ints
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| /arch/cris/arch-v32/drivers/ |
| D | sync_serial.c | 1306 reg_dma_r_masked_intr masked; in tr_interrupt() local
1319 masked = REG_RD(dma, port->regi_dmaout, r_masked_intr); in tr_interrupt()
1320 if (!masked.data) in tr_interrupt()
1418 reg_dma_r_masked_intr masked; in rx_interrupt() local
1431 masked = REG_RD(dma, port->regi_dmain, r_masked_intr); in rx_interrupt()
1433 if (masked.data) /* Descriptor interrupt */ in rx_interrupt()
1482 reg_sser_r_masked_intr masked; in manual_interrupt() local
1493 masked = REG_RD(sser, port->regi_sser, r_masked_intr); in manual_interrupt()
1494 if (masked.rdav) /* Data received? */ in manual_interrupt()
1537 if (masked.trdy) /* Transmitter ready? */ in manual_interrupt()
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| /arch/arm/mach-omap1/ |
| D | ams-delta-fiq-handler.S | 105 bics r13, r13, r11 @ clear masked - any left?
131 bics r13, r13, r11 @ clear masked - any left?
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| /arch/x86/include/asm/ |
| D | kvm.h | 287 __u8 masked; member
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| D | kvm_host.h | 654 void (*set_nmi_mask)(struct kvm_vcpu *vcpu, bool masked);
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| /arch/x86/kernel/apic/ |
| D | io_apic.c | 2566 struct irq_cfg *cfg, bool masked) in ioapic_irqd_unmask() argument
2568 if (unlikely(masked)) { in ioapic_irqd_unmask()
2606 struct irq_cfg *cfg, bool masked) in ioapic_irqd_unmask() argument
2616 bool masked; in ack_apic_level() local
2619 masked = ioapic_irqd_mask(data, cfg); in ack_apic_level()
2675 ioapic_irqd_unmask(data, cfg, masked); in ack_apic_level()
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| /arch/x86/um/ |
| D | checksum_32.S | 203 notl %ecx # 1->2, 2->1, 3->0, higher bits are masked
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| /arch/x86/lib/ |
| D | checksum_32.S | 245 notl %ecx # 1->2, 2->1, 3->0, higher bits are masked
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| /arch/x86/kvm/ |
| D | vmx.c | 4054 static void vmx_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked) in vmx_set_nmi_mask() argument
4059 if (vmx->soft_vnmi_blocked != masked) { in vmx_set_nmi_mask()
4060 vmx->soft_vnmi_blocked = masked; in vmx_set_nmi_mask()
4064 vmx->nmi_known_unmasked = !masked; in vmx_set_nmi_mask()
4065 if (masked) in vmx_set_nmi_mask()
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| D | svm.c | 3595 static void svm_set_nmi_mask(struct kvm_vcpu *vcpu, bool masked) in svm_set_nmi_mask() argument
3599 if (masked) { in svm_set_nmi_mask()
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| D | x86.c | 2452 events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu); in kvm_vcpu_ioctl_x86_get_vcpu_events()
2487 kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked); in kvm_vcpu_ioctl_x86_set_vcpu_events()
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| /arch/x86/math-emu/ |
| D | README | 115 (b) the underflow exception is masked.
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| /arch/x86/ |
| D | Kconfig | 879 entry in the chipset's IO-APIC is masked (as, e.g. the RT
882 the original IRQ line masked so that only the equivalent "boot
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