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Searched refs:PGDIR_SHIFT (Results 1 – 25 of 85) sorted by relevance

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/arch/x86/include/asm/
Dpgtable_64_types.h32 #define PGDIR_SHIFT 48 macro
48 #define PGDIR_SHIFT 39 macro
75 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
98 #define GUARD_HOLE_SIZE (16UL << PGDIR_SHIFT)
99 #define GUARD_HOLE_BASE_ADDR (GUARD_HOLE_PGD_ENTRY << PGDIR_SHIFT)
103 #define LDT_BASE_ADDR (LDT_PGD_ENTRY << PGDIR_SHIFT)
Dpgtable-2level_types.h27 #define PGDIR_SHIFT 22 macro
Dpgtable-3level_types.h32 #define PGDIR_SHIFT 30 macro
Dpgtable_32_types.h18 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
/arch/m68k/include/asm/
Dpgtable_mm.h43 #define PGDIR_SHIFT 17 macro
45 #define PGDIR_SHIFT 22 macro
47 #define PGDIR_SHIFT 25 macro
49 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
/arch/arc/include/asm/
Dpgtable.h207 #define PGDIR_SHIFT 24 macro
209 #define PGDIR_SHIFT 21 macro
215 #define PGDIR_SHIFT 21 macro
218 #define BITS_FOR_PTE (PGDIR_SHIFT - PAGE_SHIFT)
219 #define BITS_FOR_PGD (32 - PGDIR_SHIFT)
221 #define PGDIR_SIZE _BITUL(PGDIR_SHIFT) /* vaddr span, not PDG sz */
343 #define pgd_index(addr) ((addr) >> PGDIR_SHIFT)
/arch/powerpc/include/asm/nohash/64/
Dpgtable-64k.h42 #define PGDIR_SHIFT (PMD_SHIFT + PMD_INDEX_SIZE) macro
43 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
Dpgtable-4k.h40 #define PGDIR_SHIFT (PUD_SHIFT + PUD_INDEX_SIZE) macro
41 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
/arch/powerpc/include/asm/
Dmmu-44x.h148 #define PPC44x_PGD_OFF_SHIFT (32 - PGDIR_SHIFT + PGD_T_LOG2)
149 #define PPC44x_PGD_OFF_MASK_BIT (PGDIR_SHIFT - PGD_T_LOG2)
150 #define PPC44x_PTE_ADD_SHIFT (32 - PGDIR_SHIFT + PTE_SHIFT + PTE_T_LOG2)
/arch/um/include/asm/
Dpgtable-2level.h16 #define PGDIR_SHIFT 22 macro
17 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
Dpgtable-3level.h16 #define PGDIR_SHIFT 30 macro
18 #define PGDIR_SHIFT 31 macro
20 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
/arch/sh/include/asm/
Dpgtable-3level.h17 #define PGDIR_SHIFT 30 macro
27 #define PTRS_PER_PMD ((1 << PGDIR_SHIFT) / PMD_SIZE)
Dpgtable-2level.h20 #define PGDIR_SHIFT (PTE_SHIFT + PTE_BITS) macro
/arch/arm/include/asm/
Dpgtable-nommu.h34 #define PGDIR_SHIFT 21 macro
36 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
Dpgtable-2level.h86 #define PGDIR_SHIFT 21 macro
90 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
/arch/mips/include/asm/
Dpgtable-64.h51 #define PGDIR_SHIFT (PAGE_SHIFT + PAGE_SHIFT + PTE_ORDER - 3) macro
60 # define PGDIR_SHIFT (PMD_SHIFT + (PAGE_SHIFT + PMD_ORDER - 3)) macro
68 #define PGDIR_SHIFT (PUD_SHIFT + (PAGE_SHIFT + PUD_ORDER - 3)) macro
71 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
335 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
Dpgtable-32.h47 #define PGDIR_SHIFT (2 * PAGE_SHIFT + PTE_ORDER - PTE_T_LOG2) macro
48 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
161 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
/arch/xtensa/include/asm/
Dpgtable.h53 #define PGDIR_SHIFT 22 macro
54 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
67 #define FIRST_USER_PGD_NR (FIRST_USER_ADDRESS >> PGDIR_SHIFT)
367 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
410 #define _PGD_INDEX(rt,rs) extui rt, rs, PGDIR_SHIFT, 32-PGDIR_SHIFT
/arch/powerpc/include/asm/nohash/32/
Dpgtable.h24 #define PGD_INDEX_SIZE (32 - PGDIR_SHIFT)
49 #define PGDIR_SHIFT (PAGE_SHIFT + PTE_INDEX_SIZE) macro
50 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
316 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
/arch/parisc/include/asm/
Dpgtable.h126 #define PGDIR_SHIFT (PMD_SHIFT + BITS_PER_PMD) macro
127 #if (PGDIR_SHIFT + PAGE_SHIFT + PGD_ORDER - BITS_PER_PGD_ENTRY) > BITS_PER_LONG
128 #define BITS_PER_PGD (BITS_PER_LONG - PGDIR_SHIFT)
132 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
138 #define MAX_ADDRBITS (PGDIR_SHIFT + BITS_PER_PGD)
420 #define pgd_index(address) ((address) >> PGDIR_SHIFT)
424 ((mm)->pgd + ((address) >> PGDIR_SHIFT))
/arch/metag/include/asm/
Dpgtable.h36 #define PGDIR_SHIFT 22 macro
37 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
182 #define pgd_index(address) ((((address) & ~0x80000000) >> PGDIR_SHIFT) \
185 #define pgd_index(address) (((address) >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
/arch/metag/mm/
Dmmu-meta2.c29 offset = vaddr >> PGDIR_SHIFT; in mmu_read_first_level_page()
34 linear_base = (phys0 >> PGDIR_SHIFT) & 0x1ff; in mmu_read_first_level_page()
/arch/ia64/include/asm/
Dpgtable.h122 #define PGDIR_SHIFT (PUD_SHIFT + (PTRS_PER_PTD_SHIFT)) macro
124 #define PGDIR_SHIFT (PMD_SHIFT + (PTRS_PER_PTD_SHIFT)) macro
126 #define PGDIR_SIZE (__IA64_UL(1) << PGDIR_SHIFT)
243 #define RGN_MAP_SHIFT (PGDIR_SHIFT + PTRS_PER_PGD_SHIFT - 3)
365 unsigned long l1index = (address >> PGDIR_SHIFT) & ((PTRS_PER_PGD >> 3) - 1); in pgd_index()
381 (init_mm.pgd + (((addr) >> PGDIR_SHIFT) & (PTRS_PER_PGD - 1)))
/arch/openrisc/include/asm/
Dpgtable.h61 #define PGDIR_SHIFT (PAGE_SHIFT + (PAGE_SHIFT-2)) macro
62 #define PGDIR_SIZE (1UL << PGDIR_SHIFT)
73 #define PTRS_PER_PGD (1UL << (32-PGDIR_SHIFT))
376 #define pgd_index(address) ((address >> PGDIR_SHIFT) & (PTRS_PER_PGD-1))
/arch/arm64/include/asm/
Dpgtable-hwdef.h78 #define PGDIR_SHIFT ARM64_HW_PGTABLE_LEVEL_SHIFT(4 - CONFIG_PGTABLE_LEVELS) macro
79 #define PGDIR_SIZE (_AC(1, UL) << PGDIR_SHIFT)
81 #define PTRS_PER_PGD (1 << (VA_BITS - PGDIR_SHIFT))

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