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/arch/metag/oprofile/
DMakefile4 oprofile-core-y += buffer_sync.o
5 oprofile-core-y += cpu_buffer.o
6 oprofile-core-y += event_buffer.o
7 oprofile-core-y += oprof.o
8 oprofile-core-y += oprofile_files.o
9 oprofile-core-y += oprofile_stats.o
10 oprofile-core-y += oprofilefs.o
11 oprofile-core-y += timer_int.o
12 oprofile-core-$(CONFIG_HW_PERF_EVENTS) += oprofile_perf.o
16 oprofile-y += $(addprefix ../../../drivers/oprofile/,$(oprofile-core-y))
/arch/s390/numa/
Dmode_emu.c95 static int core_pinned_to_node_id(struct toptree *core) in core_pinned_to_node_id() argument
97 return emu_cores->to_node_id[core->id]; in core_pinned_to_node_id()
105 struct toptree *core; in cores_free() local
108 toptree_for_each(core, tree, CORE) { in cores_free()
109 if (core_pinned_to_node_id(core) == NODE_ID_FREE) in cores_free()
118 static struct toptree *core_node(struct toptree *core) in core_node() argument
120 return core->parent->parent->parent->parent; in core_node()
126 static struct toptree *core_drawer(struct toptree *core) in core_drawer() argument
128 return core->parent->parent->parent; in core_drawer()
134 static struct toptree *core_book(struct toptree *core) in core_book() argument
[all …]
/arch/mips/include/asm/netlogic/xlp-hal/
Dsys.h121 #define SYS_CPU_PLL_CTRL0(core) (0x1c0 + (core * 4)) argument
122 #define SYS_CPU_PLL_CTRL1(core) (0x1c1 + (core * 4)) argument
123 #define SYS_CPU_PLL_CTRL2(core) (0x1c2 + (core * 4)) argument
124 #define SYS_CPU_PLL_CTRL3(core) (0x1c3 + (core * 4)) argument
155 #define SYS_9XX_CPU_PLL_CTRL0(core) (0xc0 + (core * 4)) argument
156 #define SYS_9XX_CPU_PLL_CTRL1(core) (0xc1 + (core * 4)) argument
157 #define SYS_9XX_CPU_PLL_CTRL2(core) (0xc2 + (core * 4)) argument
158 #define SYS_9XX_CPU_PLL_CTRL3(core) (0xc3 + (core * 4)) argument
/arch/arm64/crypto/
DMakefile12 sha1-ce-y := sha1-ce-glue.o sha1-ce-core.o
15 sha2-ce-y := sha2-ce-glue.o sha2-ce-core.o
18 ghash-ce-y := ghash-ce-glue.o ghash-ce-core.o
21 crct10dif-ce-y := crct10dif-ce-core.o crct10dif-ce-glue.o
24 crc32-ce-y:= crc32-ce-core.o crc32-ce-glue.o
27 aes-ce-cipher-y := aes-ce-core.o aes-ce-glue.o
30 aes-ce-ccm-y := aes-ce-ccm-glue.o aes-ce-ccm-core.o
39 sha256-arm64-y := sha256-glue.o sha256-core.o
42 sha512-arm64-y := sha512-glue.o sha512-core.o
45 chacha20-neon-y := chacha20-neon-core.o chacha20-neon-glue.o
[all …]
D.gitignore1 sha256-core.S
2 sha512-core.S
/arch/mips/netlogic/xlp/
Dwakeup.c53 static int xlp_wakeup_core(uint64_t sysbase, int node, int core) in xlp_wakeup_core() argument
58 coremask = (1 << core); in xlp_wakeup_core()
114 int core, n, cpu, ncores; in xlp_enable_secondary_cores() local
172 for (core = 0; core < ncores; core++) { in xlp_enable_secondary_cores()
174 if (n == 0 && core == 0) in xlp_enable_secondary_cores()
178 if ((syscoremask & (1 << core)) == 0) in xlp_enable_secondary_cores()
182 cpu = (n * ncores + core) * NLM_THREADS_PER_CORE; in xlp_enable_secondary_cores()
187 if (!xlp_wakeup_core(nodep->sysbase, n, core)) in xlp_enable_secondary_cores()
191 nodep->coremask |= 1u << core; in xlp_enable_secondary_cores()
195 pr_err("Node %d : timeout core %d\n", n, core); in xlp_enable_secondary_cores()
Dnlm_hal.c228 static unsigned int nlm_xlp2_get_core_frequency(int node, int core) in nlm_xlp2_get_core_frequency() argument
236 SYS_9XX_CPU_PLL_CTRL0(core)); in nlm_xlp2_get_core_frequency()
238 SYS_9XX_CPU_PLL_CTRL1(core)); in nlm_xlp2_get_core_frequency()
242 SYS_CPU_PLL_CTRL0(core)); in nlm_xlp2_get_core_frequency()
244 SYS_CPU_PLL_CTRL1(core)); in nlm_xlp2_get_core_frequency()
274 static unsigned int nlm_xlp_get_core_frequency(int node, int core) in nlm_xlp_get_core_frequency() argument
286 dfs_div = ((dfsval >> (core * 4)) & 0xf) + 1; in nlm_xlp_get_core_frequency()
295 unsigned int nlm_get_core_frequency(int node, int core) in nlm_get_core_frequency() argument
298 return nlm_xlp2_get_core_frequency(node, core); in nlm_get_core_frequency()
300 return nlm_xlp_get_core_frequency(node, core); in nlm_get_core_frequency()
/arch/mips/kernel/
Dsmp-cps.c42 static unsigned core_vpe_count(unsigned int cluster, unsigned core) in core_vpe_count() argument
47 return mips_cps_numvps(cluster, core); in core_vpe_count()
218 static void boot_core(unsigned int core, unsigned int vpe_id) in boot_core() argument
224 mips_cm_lock_other(0, core, 0, CM_GCR_Cx_OTHER_BLOCK_LOCAL); in boot_core()
236 set_gcr_access(1 << core); in boot_core()
240 mips_cpc_lock_other(core); in boot_core()
274 core, stat); in boot_core()
287 bitmap_set(core_power, core, 1); in boot_core()
292 unsigned core = cpu_core(&current_cpu_data); in remote_vpe_boot() local
293 struct core_boot_config *core_cfg = &mips_cps_core_bootcfg[core]; in remote_vpe_boot()
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/arch/arm/crypto/
DMakefile42 aes-arm-y := aes-cipher-core.o aes-cipher-glue.o
43 aes-arm-bs-y := aes-neonbs-core.o aes-neonbs-glue.o
47 sha256-arm-y := sha256-core.o sha256_glue.o $(sha256-arm-neon-y)
49 sha512-arm-y := sha512-core.o sha512-glue.o $(sha512-arm-neon-y)
50 sha1-arm-ce-y := sha1-ce-core.o sha1-ce-glue.o
51 sha2-arm-ce-y := sha2-ce-core.o sha2-ce-glue.o
52 aes-arm-ce-y := aes-ce-core.o aes-ce-glue.o
53 ghash-arm-ce-y := ghash-ce-core.o ghash-ce-glue.o
54 crct10dif-arm-ce-y := crct10dif-ce-core.o crct10dif-ce-glue.o
55 crc32-arm-ce-y:= crc32-ce-core.o crc32-ce-glue.o
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D.gitignore1 aesbs-core.S
2 sha256-core.S
3 sha512-core.S
/arch/mips/include/asm/octeon/
Dcvmx-coremask.h49 int core) in cvmx_coremask_is_core_set() argument
53 n = core % CVMX_COREMASK_ELTSZ; in cvmx_coremask_is_core_set()
54 i = core / CVMX_COREMASK_ELTSZ; in cvmx_coremask_is_core_set()
80 static inline void cvmx_coremask_clear_core(struct cvmx_coremask *pcm, int core) in cvmx_coremask_clear_core() argument
84 n = core % CVMX_COREMASK_ELTSZ; in cvmx_coremask_clear_core()
85 i = core / CVMX_COREMASK_ELTSZ; in cvmx_coremask_clear_core()
/arch/powerpc/platforms/ps3/
Dsystem-bus.c362 dev->match_id, dev->match_sub_id, dev_name(&dev->core), in ps3_system_bus_match()
363 drv->match_id, drv->match_sub_id, drv->core.name); in ps3_system_bus_match()
367 dev->match_id, dev->match_sub_id, dev_name(&dev->core), in ps3_system_bus_match()
368 drv->match_id, drv->match_sub_id, drv->core.name); in ps3_system_bus_match()
389 dev_name(&dev->core)); in ps3_system_bus_probe()
391 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core)); in ps3_system_bus_probe()
410 dev_dbg(&dev->core, "%s:%d %s: no remove method\n", in ps3_system_bus_remove()
411 __func__, __LINE__, drv->core.name); in ps3_system_bus_remove()
413 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev_name(&dev->core)); in ps3_system_bus_remove()
424 dev_dbg(&dev->core, " -> %s:%d: match_id %d\n", __func__, __LINE__, in ps3_system_bus_shutdown()
[all …]
/arch/arm/mach-integrator/
DKconfig46 bool "Integrator/CM7TDMI core module"
52 bool "Integrator/CM720T core module"
58 bool "Integrator/CM740T core module"
64 bool "Integrator/CM920T core module"
70 bool "Integrator/CM922T-XA10 core module"
76 bool "Integrator/CM926EJ-S core module"
82 bool "Integrator/CM940T core module"
88 bool "Integrator/CM946E-S core module"
94 bool "Integrator/CM966E-S core module"
99 bool "Integrator/CM10200E rev.0 core module"
[all …]
/arch/arc/plat-eznps/include/plat/
Dmtm.h25 u32 core, blkid; in nps_mtm_reg_addr() local
28 core = gid.core; in nps_mtm_reg_addr()
29 blkid = (((core & 0x0C) << 2) | (core & 0x03)); in nps_mtm_reg_addr()
/arch/c6x/boot/dts/
Dtms320c6678.dtsi61 compatible = "ti,c64x+core-pic";
81 ti,core-mask = < 0x01 >;
87 ti,core-mask = < 0x02 >;
93 ti,core-mask = < 0x04 >;
99 ti,core-mask = < 0x08 >;
105 ti,core-mask = < 0x10 >;
111 ti,core-mask = < 0x20 >;
117 ti,core-mask = < 0x40 >;
123 ti,core-mask = < 0x80 >;
Dtms320c6472.dtsi51 compatible = "ti,c64x+core-pic";
71 ti,core-mask = < 0x01 >;
77 ti,core-mask = < 0x02 >;
83 ti,core-mask = < 0x04 >;
89 ti,core-mask = < 0x08 >;
95 ti,core-mask = < 0x10 >;
101 ti,core-mask = < 0x20 >;
Dtms320c6474.dtsi38 compatible = "ti,c64x+core-pic";
56 ti,core-mask = < 0x04 >;
62 ti,core-mask = < 0x02 >;
68 ti,core-mask = < 0x01 >;
/arch/arc/
DMakefile81 core-y += arch/arc/
84 core-y += arch/arc/boot/dts/
86 core-y += arch/arc/plat-sim/
87 core-$(CONFIG_ARC_PLAT_TB10X) += arch/arc/plat-tb10x/
88 core-$(CONFIG_ARC_PLAT_AXS10X) += arch/arc/plat-axs10x/
89 core-$(CONFIG_ARC_PLAT_EZNPS) += arch/arc/plat-eznps/
90 core-$(CONFIG_ARC_SOC_HSDK) += arch/arc/plat-hsdk/
/arch/ia64/
DMakefile48 core-y += arch/ia64/kernel/ arch/ia64/mm/
49 core-$(CONFIG_IA64_DIG) += arch/ia64/dig/
50 core-$(CONFIG_IA64_DIG_VTD) += arch/ia64/dig/
51 core-$(CONFIG_IA64_GENERIC) += arch/ia64/dig/
52 core-$(CONFIG_IA64_HP_ZX1) += arch/ia64/dig/
53 core-$(CONFIG_IA64_HP_ZX1_SWIOTLB) += arch/ia64/dig/
54 core-$(CONFIG_IA64_SGI_SN2) += arch/ia64/sn/
55 core-$(CONFIG_IA64_SGI_UV) += arch/ia64/uv/
/arch/cris/include/arch-v32/arch/hwregs/
DMakefile57 REGDESC += $(BASEDIR)/core/cpu/intr_vect/rtl/guinness/ivmask.config.r
58 REGDESC += $(BASEDIR)/core/memarb/rtl/guinness/marb_top.r
59 REGDESC += $(BASEDIR)/core/cpu/mmu/doc/mmu_regs.r
63 REGDESC += $(BASEDIR)/core/strcop/rtl/strcop_regs.r
102 dma_defs.h: $(BASEDIR)/core/dma/rtl/common/dma_regdes.r
104 $(BASEDIR)/core/dma/sw/dma.h:
105 dma.h: $(BASEDIR)/core/dma/sw/dma.h
113 intr_vect_defs.h: $(BASEDIR)/core/cpu/intr_vect/rtl/guinness/ivmask.config.r
115 intr_vect_defs_asm.h: $(BASEDIR)/core/cpu/intr_vect/rtl/guinness/ivmask.config.r
122 mmu_defs_asm.h: $(BASEDIR)/core/cpu/mmu/doc/mmu_regs.r
[all …]
/arch/arm64/kernel/
Dmodule-plts.c22 struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core : in module_emit_plt_entry()
132 mod->arch.core.plt = sechdrs + i; in module_frob_arch_sections()
143 if (!mod->arch.core.plt || !mod->arch.init.plt) { in module_frob_arch_sections()
175 mod->arch.core.plt->sh_type = SHT_NOBITS; in module_frob_arch_sections()
176 mod->arch.core.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; in module_frob_arch_sections()
177 mod->arch.core.plt->sh_addralign = L1_CACHE_BYTES; in module_frob_arch_sections()
178 mod->arch.core.plt->sh_size = (core_plts + 1) * sizeof(struct plt_entry); in module_frob_arch_sections()
179 mod->arch.core.plt_num_entries = 0; in module_frob_arch_sections()
180 mod->arch.core.plt_max_entries = core_plts; in module_frob_arch_sections()
/arch/arm/kernel/
Dmodule-plts.c41 struct mod_plt_sec *pltsec = !in_init(mod, loc) ? &mod->arch.core : in get_module_plt()
205 mod->arch.core.plt = s; in module_frob_arch_sections()
212 if (!mod->arch.core.plt || !mod->arch.init.plt) { in module_frob_arch_sections()
244 mod->arch.core.plt->sh_type = SHT_NOBITS; in module_frob_arch_sections()
245 mod->arch.core.plt->sh_flags = SHF_EXECINSTR | SHF_ALLOC; in module_frob_arch_sections()
246 mod->arch.core.plt->sh_addralign = L1_CACHE_BYTES; in module_frob_arch_sections()
247 mod->arch.core.plt->sh_size = round_up(core_plts * PLT_ENT_SIZE, in module_frob_arch_sections()
249 mod->arch.core.plt_count = 0; in module_frob_arch_sections()
259 mod->arch.core.plt->sh_size, mod->arch.init.plt->sh_size); in module_frob_arch_sections()
/arch/arm64/boot/dts/arm/
Djuno-sched-energy.dtsi10 CPU_COST_A57: core-cost0 {
25 CPU_COST_A53: core-cost1 {
71 CPU_COST_A72: core-cost2 {
84 CPU_COST_A53R2: core-cost3 {
/arch/powerpc/include/asm/
Dcputhreads.h74 int cpu_first_thread_of_core(int core);
77 static inline int cpu_first_thread_of_core(int core) { return core; } in cpu_first_thread_of_core() argument
/arch/powerpc/kvm/
Dbook3s_hv_rm_xics.c88 int core; in grab_next_hostcore() local
91 for (core = start + 1; core < max; core++) { in grab_next_hostcore()
92 old = new = READ_ONCE(rm_core[core].rm_state); in grab_next_hostcore()
100 success = cmpxchg64(&rm_core[core].rm_state.raw, in grab_next_hostcore()
110 return core; in grab_next_hostcore()
119 int core; in find_available_hostcore() local
123 core = grab_next_hostcore(my_core, rm_core, cpu_nr_cores(), action); in find_available_hostcore()
124 if (core == -1) in find_available_hostcore()
125 core = grab_next_hostcore(core, rm_core, my_core, action); in find_available_hostcore()
127 return core; in find_available_hostcore()
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