| /arch/nios2/kernel/ |
| D | cpuinfo.c | 30 struct cpuinfo cpuinfo; variable
59 cpuinfo.cpu_clock_freq = fcpu(cpu, "clock-frequency"); in setup_cpuinfo()
63 strlcpy(cpuinfo.cpu_impl, str, sizeof(cpuinfo.cpu_impl)); in setup_cpuinfo()
65 strcpy(cpuinfo.cpu_impl, "<unknown>"); in setup_cpuinfo()
67 cpuinfo.has_div = of_property_read_bool(cpu, "altr,has-div"); in setup_cpuinfo()
68 cpuinfo.has_mul = of_property_read_bool(cpu, "altr,has-mul"); in setup_cpuinfo()
69 cpuinfo.has_mulx = of_property_read_bool(cpu, "altr,has-mulx"); in setup_cpuinfo()
70 cpuinfo.has_bmx = of_property_read_bool(cpu, "altr,has-bmx"); in setup_cpuinfo()
71 cpuinfo.has_cdx = of_property_read_bool(cpu, "altr,has-cdx"); in setup_cpuinfo()
72 cpuinfo.mmu = of_property_read_bool(cpu, "altr,has-mmu"); in setup_cpuinfo()
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| D | setup.c | 209 copy_exception_handler(cpuinfo.exception_addr); in setup_arch()
213 copy_fast_tlb_miss_handler(cpuinfo.fast_tlb_miss_exc_addr); in setup_arch()
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| D | Makefile | 9 obj-y += cpuinfo.o
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| D | process.c | 46 pr_notice("Machine restart (%08x)...\n", cpuinfo.reset_addr); in machine_restart()
51 : "r" (cpuinfo.reset_addr) in machine_restart()
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| /arch/microblaze/kernel/cpu/ |
| D | mb.c | 36 if (cpuinfo.fpga_family_code == family_string_lookup[i].k) { in show_cpuinfo()
44 if (cpuinfo.ver_code == cpu_ver_lookup[i].k) { in show_cpuinfo()
58 cpuinfo.endian ? "little" : "big", in show_cpuinfo()
59 cpuinfo.cpu_clock_freq / 1000000, in show_cpuinfo()
60 cpuinfo.cpu_clock_freq % 1000000, in show_cpuinfo()
69 (cpuinfo.use_instr & PVR0_USE_BARREL_MASK) ? "yes" : "no", in show_cpuinfo()
70 (cpuinfo.use_instr & PVR2_USE_MSR_INSTR) ? "yes" : "no", in show_cpuinfo()
71 (cpuinfo.use_instr & PVR2_USE_PCMP_INSTR) ? "yes" : "no", in show_cpuinfo()
72 (cpuinfo.use_instr & PVR0_USE_DIV_MASK) ? "yes" : "no"); in show_cpuinfo()
74 seq_printf(m, " MMU:\t\t%x\n", cpuinfo.mmu); in show_cpuinfo()
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| D | cache.c | 169 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_msr_irq()
175 CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic); in __flush_icache_range_msr_irq()
177 for (i = start; i < end; i += cpuinfo.icache_line_length) in __flush_icache_range_msr_irq()
196 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_nomsr_irq()
202 CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic); in __flush_icache_range_nomsr_irq()
204 for (i = start; i < end; i += cpuinfo.icache_line_length) in __flush_icache_range_nomsr_irq()
223 cpuinfo.icache_line_length, cpuinfo.icache_size); in __flush_icache_range_noirq()
225 CACHE_RANGE_LOOP_1(start, end, cpuinfo.icache_line_length, wic); in __flush_icache_range_noirq()
227 for (i = start; i < end; i += cpuinfo.icache_line_length) in __flush_icache_range_noirq()
244 CACHE_ALL_LOOP(cpuinfo.icache_size, cpuinfo.icache_line_length, wic); in __flush_icache_all_msr_irq()
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| D | cpuinfo.c | 87 struct cpuinfo cpuinfo; variable
102 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
109 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
110 set_cpuinfo_pvr_full(&cpuinfo, cpu); in setup_cpuinfo()
114 set_cpuinfo_static(&cpuinfo, cpu); in setup_cpuinfo()
117 if (cpuinfo.mmu_privins) in setup_cpuinfo()
130 cpuinfo.cpu_clock_freq = fcpu(cpu, "timebase-frequency"); in setup_cpuinfo_clk()
132 cpuinfo.cpu_clock_freq = clk_get_rate(clk); in setup_cpuinfo_clk()
135 if (!cpuinfo.cpu_clock_freq) { in setup_cpuinfo_clk()
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| D | Makefile | 13 obj-y += cache.o cpuinfo.o cpuinfo-pvr-full.o cpuinfo-static.o mb.o pvr.o
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| /arch/openrisc/kernel/ |
| D | setup.c | 96 struct cpuinfo cpuinfo; variable
109 version, revision, cpuinfo.clock_frequency / 1000000); in print_cpuinfo()
120 cpuinfo.dcache_size, cpuinfo.dcache_block_size, in print_cpuinfo()
121 cpuinfo.dcache_ways); in print_cpuinfo()
127 cpuinfo.icache_size, cpuinfo.icache_block_size, in print_cpuinfo()
128 cpuinfo.icache_ways); in print_cpuinfo()
167 cpuinfo.icache_ways = 1 << (iccfgr & SPR_ICCFGR_NCW); in setup_cpuinfo()
169 cpuinfo.icache_block_size = 16 << ((iccfgr & SPR_ICCFGR_CBS) >> 7); in setup_cpuinfo()
170 cpuinfo.icache_size = in setup_cpuinfo()
171 cache_set_size * cpuinfo.icache_ways * cpuinfo.icache_block_size; in setup_cpuinfo()
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| D | dma.c | 45 for (cl = __pa(addr); cl < __pa(next); cl += cpuinfo.dcache_block_size) in page_set_nocache()
151 cl += cpuinfo.dcache_block_size) in or1k_map_page()
157 cl += cpuinfo.dcache_block_size) in or1k_map_page()
218 for (cl = addr; cl < addr + size; cl += cpuinfo.dcache_block_size) in or1k_sync_single_for_cpu()
231 for (cl = addr; cl < addr + size; cl += cpuinfo.dcache_block_size) in or1k_sync_single_for_device()
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| D | time.c | 108 cpuinfo.clock_frequency, in openrisc_clockevent_init()
135 if (clocksource_register_hz(&openrisc_timer, cpuinfo.clock_frequency)) in openrisc_timer_init()
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| /arch/mips/include/asm/ |
| D | cpu-info.h | 142 static inline unsigned int cpu_cluster(struct cpuinfo_mips *cpuinfo) in cpu_cluster() argument
148 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CLUSTER) >> in cpu_cluster()
152 static inline unsigned int cpu_core(struct cpuinfo_mips *cpuinfo) in cpu_core() argument
154 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_CORE) >> in cpu_core()
158 static inline unsigned int cpu_vpe_id(struct cpuinfo_mips *cpuinfo) in cpu_vpe_id() argument
164 return (cpuinfo->globalnumber & MIPS_GLOBALNUMBER_VP) >> in cpu_vpe_id()
168 extern void cpu_set_cluster(struct cpuinfo_mips *cpuinfo, unsigned int cluster);
169 extern void cpu_set_core(struct cpuinfo_mips *cpuinfo, unsigned int core);
170 extern void cpu_set_vpe_id(struct cpuinfo_mips *cpuinfo, unsigned int vpe);
194 static inline unsigned long cpu_asid_mask(struct cpuinfo_mips *cpuinfo) in cpu_asid_mask() argument
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| /arch/nios2/mm/ |
| D | cacheflush.c | 22 start &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
23 end += (cpuinfo.dcache_line_size - 1); in __flush_dcache()
24 end &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
26 if (end > start + cpuinfo.dcache_size) in __flush_dcache()
27 end = start + cpuinfo.dcache_size; in __flush_dcache()
29 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __flush_dcache()
41 start &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
42 end += (cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
43 end &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
45 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __invalidate_dcache()
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| D | tlb.c | 23 ((((1UL << (cpuinfo.tlb_ptr_sz - cpuinfo.tlb_num_ways_log2))) - 1) \
65 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one_pid()
78 ((PAGE_SIZE * cpuinfo.tlb_num_lines) * way) + in flush_tlb_one_pid()
129 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_one()
140 ((PAGE_SIZE * cpuinfo.tlb_num_lines) * way) + in flush_tlb_one()
163 line << (PAGE_SHIFT + cpuinfo.tlb_num_ways_log2)); in dump_tlb_line()
170 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in dump_tlb_line()
202 for (i = 0; i < cpuinfo.tlb_num_lines; i++) in dump_tlb()
215 for (line = 0; line < cpuinfo.tlb_num_lines; line++) { in flush_tlb_pid()
218 for (way = 0; way < cpuinfo.tlb_num_ways; way++) { in flush_tlb_pid()
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| D | mmu_context.c | 21 #define PID_BITS (cpuinfo.tlb_pid_num_bits)
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| /arch/openrisc/include/asm/ |
| D | cpuinfo.h | 22 struct cpuinfo { struct
34 extern struct cpuinfo cpuinfo; argument
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| D | serial.h | 32 #define BASE_BAUD (cpuinfo.clock_frequency/16)
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| /arch/microblaze/include/asm/ |
| D | cpuinfo.h | 33 struct cpuinfo { struct
90 extern struct cpuinfo cpuinfo; argument
96 void set_cpuinfo_static(struct cpuinfo *ci, struct device_node *cpu);
97 void set_cpuinfo_pvr_full(struct cpuinfo *ci, struct device_node *cpu);
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| /arch/nios2/include/asm/ |
| D | cpuinfo.h | 24 struct cpuinfo { struct
55 extern struct cpuinfo cpuinfo; argument
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| D | registers.h | 61 #define TLBMISC_PID_MASK ((1UL << cpuinfo.tlb_pid_num_bits) - 1)
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| /arch/metag/kernel/ |
| D | topology.c | 54 struct cpuinfo_metag *cpuinfo = &per_cpu(cpu_data, i); in topology_init() local
56 cpuinfo->cpu.hotpluggable = 1; in topology_init()
58 ret = register_cpu(&cpuinfo->cpu, i); in topology_init()
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| /arch/microblaze/mm/ |
| D | consistent.c | 49 # define UNCACHED_SHADOW_MASK (cpuinfo.dcache_high - cpuinfo.dcache_base + 1)
103 if ((unsigned int)ret > cpuinfo.dcache_base && in consistent_alloc()
104 (unsigned int)ret < cpuinfo.dcache_high) in consistent_alloc()
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| /arch/parisc/kernel/ |
| D | processor.c | 375 const struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); in show_cpuinfo() local
377 if (0 == cpuinfo->hpa) in show_cpuinfo()
414 cpuinfo->dev ? in show_cpuinfo()
415 cpuinfo->dev->name : "Unknown"); in show_cpuinfo()
426 cpuinfo->loops_per_jiffy / (500000 / HZ), in show_cpuinfo()
427 (cpuinfo->loops_per_jiffy / (5000 / HZ)) % 100); in show_cpuinfo()
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| D | time.c | 68 struct cpuinfo_parisc *cpuinfo = &per_cpu(cpu_data, cpu); in timer_interrupt() local
76 next_tick = cpuinfo->it_value; in timer_interrupt()
86 cpuinfo->it_value = next_tick; in timer_interrupt()
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| /arch/arm64/kernel/ |
| D | cpuinfo.c | 130 struct cpuinfo_arm64 *cpuinfo = &per_cpu(cpu_data, i); in c_show() local
131 u32 midr = cpuinfo->reg_midr; in c_show()
|