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Searched refs:valid_mask (Results 1 – 9 of 9) sorted by relevance

/arch/mips/cavium-octeon/executive/
Dcvmx-l2c.c87 uint32_t valid_mask; in cvmx_l2c_set_core_way_partition() local
89 valid_mask = (0x1 << cvmx_l2c_get_num_assoc()) - 1; in cvmx_l2c_set_core_way_partition()
91 mask &= valid_mask; in cvmx_l2c_set_core_way_partition()
94 if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN63XX)) in cvmx_l2c_set_core_way_partition()
144 uint32_t valid_mask; in cvmx_l2c_set_hw_way_partition() local
146 valid_mask = (0x1 << cvmx_l2c_get_num_assoc()) - 1; in cvmx_l2c_set_hw_way_partition()
147 mask &= valid_mask; in cvmx_l2c_set_hw_way_partition()
150 if (mask == valid_mask && !OCTEON_IS_MODEL(OCTEON_CN63XX)) in cvmx_l2c_set_hw_way_partition()
/arch/x86/events/amd/
Dibs.c88 u64 valid_mask; member
477 config &= ~perf_ibs->valid_mask; in perf_ibs_stop()
546 .valid_mask = IBS_FETCH_VAL,
571 .valid_mask = IBS_OP_VAL,
614 if (!(*buf++ & perf_ibs->valid_mask)) in perf_ibs_handle_irq()
/arch/powerpc/perf/
Disa207-common.c60 u64 valid_mask = EVENT_VALID_MASK; in is_event_valid() local
63 valid_mask = p9_EVENT_VALID_MASK; in is_event_valid()
65 return !(event & ~valid_mask); in is_event_valid()
/arch/alpha/kernel/
Derr_marvel.c140 marvel_print_po7_uncrr_sym(u64 uncrr_sym, u64 valid_mask) in marvel_print_po7_uncrr_sym() argument
187 uncrr_sym &= valid_mask; in marvel_print_po7_uncrr_sym()
189 if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__SYN)) in marvel_print_po7_uncrr_sym()
194 if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__ERR_CYC)) in marvel_print_po7_uncrr_sym()
255 if (EXTRACT(valid_mask, IO7__PO7_UNCRR_SYM__STRV_VTR)) { in marvel_print_po7_uncrr_sym()
/arch/x86/events/
Dperf_event.h431 u64 valid_mask; member
440 .valid_mask = (vm), \
Dcore.c127 if (event->attr.config1 & ~er->valid_mask) in x86_pmu_extra_regs()
/arch/arm64/kernel/
Dcpufeature.c465 u64 valid_mask = 0; in init_cpu_ftr_reg() local
478 valid_mask |= ftr_mask; in init_cpu_ftr_reg()
489 val &= valid_mask; in init_cpu_ftr_reg()
/arch/x86/events/intel/
Duncore_nhmex.c781 if (event->attr.config1 & ~er->valid_mask) in nhmex_mbox_hw_config()
Dcore.c2400 if (config & ~x86_pmu.extra_regs[alt_idx].valid_mask) in intel_alt_er()