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Searched refs:asic_type (Results 1 – 25 of 50) sorted by relevance

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/drivers/gpu/drm/amd/amdgpu/
Dvce_v3_0.c305 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_start()
342 if (adev->asic_type >= CHIP_STONEY) in vce_v3_0_stop()
368 if ((adev->asic_type == CHIP_FIJI) || in vce_v3_0_get_harvest_config()
369 (adev->asic_type == CHIP_STONEY)) in vce_v3_0_get_harvest_config()
389 if ((adev->asic_type == CHIP_POLARIS10) || in vce_v3_0_get_harvest_config()
390 (adev->asic_type == CHIP_POLARIS11) || in vce_v3_0_get_harvest_config()
391 (adev->asic_type == CHIP_POLARIS12)) in vce_v3_0_get_harvest_config()
542 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_mc_resume()
943 if (adev->asic_type >= CHIP_STONEY) { in vce_v3_0_set_ring_funcs()
Dmmhub_v1_0.c597 if (adev->asic_type != CHIP_RAVEN) { in mmhub_v1_0_update_medium_grain_clock_gating()
613 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
630 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
643 if (adev->asic_type != CHIP_RAVEN) in mmhub_v1_0_update_medium_grain_clock_gating()
649 if (adev->asic_type != CHIP_RAVEN && def2 != data2) in mmhub_v1_0_update_medium_grain_clock_gating()
708 switch (adev->asic_type) { in mmhub_v1_0_set_clockgating()
Damdgpu_acp.c288 if (adev->asic_type != CHIP_STONEY) { in acp_hw_init()
323 switch (adev->asic_type) { in acp_hw_init()
335 switch (adev->asic_type) { in acp_hw_init()
392 if (adev->asic_type != CHIP_STONEY) { in acp_hw_init()
Dsoc15.c264 switch (adev->asic_type) { in soc15_init_golden_registers()
284 if (adev->asic_type == CHIP_RAVEN) in soc15_get_xclk()
528 switch (adev->asic_type) { in soc15_set_ip_blocks()
612 switch(adev->asic_type) { in soc15_common_early_init()
625 switch (adev->asic_type) { in soc15_common_early_init()
886 switch (adev->asic_type) { in soc15_common_set_clockgating_state()
Damdgpu_uvd.c128 switch (adev->asic_type) { in amdgpu_uvd_sw_init()
213 if ((adev->asic_type == CHIP_POLARIS10 || in amdgpu_uvd_sw_init()
214 adev->asic_type == CHIP_POLARIS11) && in amdgpu_uvd_sw_init()
250 switch (adev->asic_type) { in amdgpu_uvd_sw_init()
264 adev->uvd.use_ctx_buf = adev->asic_type >= CHIP_POLARIS10; in amdgpu_uvd_sw_init()
297 if (adev->asic_type < CHIP_POLARIS10) { in amdgpu_uvd_suspend()
989 if (adev->asic_type >= CHIP_VEGA10) { in amdgpu_uvd_send_msg()
Dsdma_v4_0.c131 switch (adev->asic_type) { in sdma_v4_0_init_golden_registers()
176 switch (adev->asic_type) { in sdma_v4_0_init_microcode()
764 switch (adev->asic_type) { in sdma_v4_0_init_pg()
1196 if (adev->asic_type == CHIP_RAVEN) in sdma_v4_0_early_init()
1439 if (adev->asic_type == CHIP_VEGA10) { in sdma_v4_0_update_medium_grain_clock_gating()
1467 if (adev->asic_type == CHIP_VEGA10) { in sdma_v4_0_update_medium_grain_clock_gating()
1498 if (adev->asic_type == CHIP_VEGA10) { in sdma_v4_0_update_medium_grain_light_sleep()
1512 if (adev->asic_type == CHIP_VEGA10) { in sdma_v4_0_update_medium_grain_light_sleep()
1529 switch (adev->asic_type) { in sdma_v4_0_set_clockgating_state()
1548 switch (adev->asic_type) { in sdma_v4_0_set_powergating_state()
Dgmc_v8_0.c124 switch (adev->asic_type) { in gmc_v8_0_init_golden_registers()
220 switch (adev->asic_type) { in gmc_v8_0_init_microcode()
596 switch (adev->asic_type) { in gmc_v8_0_mc_init()
1079 if (adev->asic_type == CHIP_FIJI) in gmc_v8_0_sw_init()
1192 if (adev->asic_type == CHIP_TONGA) { in gmc_v8_0_hw_init()
1198 } else if (adev->asic_type == CHIP_POLARIS11 || in gmc_v8_0_hw_init()
1199 adev->asic_type == CHIP_POLARIS10 || in gmc_v8_0_hw_init()
1200 adev->asic_type == CHIP_POLARIS12) { in gmc_v8_0_hw_init()
1612 switch (adev->asic_type) { in gmc_v8_0_set_clockgating_state()
Dsi.c1339 switch (adev->asic_type) { in si_common_early_init()
1459 switch (adev->asic_type) { in si_init_golden_registers()
1786 if ((adev->asic_type != CHIP_OLAND) && (adev->asic_type != CHIP_HAINAN)) { in si_program_aspm()
1835 if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) in si_program_aspm()
1842 if ((adev->asic_type == CHIP_OLAND) || (adev->asic_type == CHIP_HAINAN)) in si_program_aspm()
2023 switch (adev->asic_type) { in si_set_ip_blocks()
Dkv_dpm.c776 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_unforce_levels()
1380 if (adev->asic_type == CHIP_MULLINS) in kv_dpm_disable()
1745 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_dpm_powergate_acp()
1923 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_dpm_set_power_state()
1949 if (adev->asic_type == CHIP_MULLINS) in kv_dpm_set_power_state()
2002 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) {
2107 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_force_dpm_highest()
2127 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) in kv_force_dpm_lowest()
2283 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_apply_state_adjust_rules()
2344 if (adev->asic_type == CHIP_KABINI || adev->asic_type == CHIP_MULLINS) { in kv_calculate_nbps_level_settings()
[all …]
Damdgpu_device.c134 if (adev->asic_type >= CHIP_VEGA10 && reg == 0) { in amdgpu_mm_wreg()
154 if (adev->asic_type >= CHIP_VEGA10 && reg == 1 && adev->last_mm_index == 0x5702C) { in amdgpu_mm_wreg()
171 if (adev->asic_type >= CHIP_VEGA10 && reg == 0) { in amdgpu_io_wreg()
182 if (adev->asic_type >= CHIP_VEGA10 && reg == 1 && adev->last_mm_index == 0x5702C) { in amdgpu_io_wreg()
671 if (adev->asic_type >= CHIP_BONAIRE) in amdgpu_need_post()
695 if (adev->asic_type == CHIP_FIJI) { in amdgpu_vpost_needed()
1363 switch (adev->asic_type) { in amdgpu_device_parse_gpu_info_fw()
1458 switch (adev->asic_type) { in amdgpu_early_init()
1467 if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) in amdgpu_early_init()
1494 if ((adev->asic_type == CHIP_BONAIRE) || (adev->asic_type == CHIP_HAWAII)) in amdgpu_early_init()
[all …]
Dgmc_v9_0.c516 switch (adev->asic_type) { in gmc_v9_0_mc_init()
563 switch (adev->asic_type) { in gmc_v9_0_sw_init()
695 switch (adev->asic_type) { in gmc_v9_0_init_golden_registers()
734 switch (adev->asic_type) { in gmc_v9_0_gart_enable()
Dgfx_v8_0.c664 switch (adev->asic_type) { in gfx_v8_0_init_golden_registers()
871 if ((adev->asic_type != CHIP_STONEY) && in gfx_v8_0_free_microcode()
872 (adev->asic_type != CHIP_TOPAZ)) in gfx_v8_0_free_microcode()
892 switch (adev->asic_type) { in gfx_v8_0_init_microcode()
1026 if ((adev->asic_type != CHIP_STONEY) && in gfx_v8_0_init_microcode()
1027 (adev->asic_type != CHIP_TOPAZ)) { in gfx_v8_0_init_microcode()
1182 if (adev->asic_type == CHIP_CARRIZO) in cz_init_cp_jump_table()
1278 if ((adev->asic_type == CHIP_CARRIZO) || in gfx_v8_0_rlc_init()
1279 (adev->asic_type == CHIP_STONEY)) { in gfx_v8_0_rlc_init()
1501 if (adev->asic_type != CHIP_CARRIZO) in gfx_v8_0_do_edc_gpr_workarounds()
[all …]
Damdgpu_powerplay.c45 pp_init.chip_id = adev->asic_type; in amdgpu_create_pp_handle()
65 switch (adev->asic_type) { in amdgpu_pp_early_init()
Dvi.c282 switch (adev->asic_type) { in vi_init_golden_registers()
453 if (adev->asic_type == CHIP_TONGA || in vi_detect_hw_virtualization()
454 adev->asic_type == CHIP_FIJI) { in vi_detect_hw_virtualization()
947 switch (adev->asic_type) { in vi_common_early_init()
1425 switch (adev->asic_type) { in vi_common_set_clockgating_state()
1528 switch (adev->asic_type) { in vi_set_ip_blocks()
Ddce_v11_0.c155 switch (adev->asic_type) { in dce_v11_0_init_golden_registers()
528 switch (adev->asic_type) { in dce_v11_0_get_num_crtc()
1502 switch (adev->asic_type) { in dce_v11_0_audio_init()
2314 if ((adev->asic_type == CHIP_POLARIS10) || in dce_v11_0_pick_pll()
2315 (adev->asic_type == CHIP_POLARIS11) || in dce_v11_0_pick_pll()
2316 (adev->asic_type == CHIP_POLARIS12)) { in dce_v11_0_pick_pll()
2368 if (adev->asic_type == CHIP_CARRIZO || adev->asic_type == CHIP_STONEY) { in dce_v11_0_pick_pll()
2733 if ((adev->asic_type == CHIP_POLARIS10) || in dce_v11_0_crtc_mode_set()
2734 (adev->asic_type == CHIP_POLARIS11) || in dce_v11_0_crtc_mode_set()
2735 (adev->asic_type == CHIP_POLARIS12)) { in dce_v11_0_crtc_mode_set()
[all …]
Dgmc_v7_0.c68 switch (adev->asic_type) { in gmc_v7_0_init_golden_registers()
132 switch (adev->asic_type) { in gmc_v7_0_init_microcode()
149 if (adev->asic_type == CHIP_TOPAZ) in gmc_v7_0_init_microcode()
391 switch (adev->asic_type) { in gmc_v7_0_mc_init()
670 if (adev->asic_type == CHIP_KAVERI) { in gmc_v7_0_gart_enable()
Ddce_v8_0.c448 switch (adev->asic_type) { in dce_v8_0_get_num_crtc()
1433 if (adev->asic_type == CHIP_KAVERI) /* KV: 4 streams, 7 endpoints */ in dce_v8_0_audio_init()
1435 else if ((adev->asic_type == CHIP_KABINI) || in dce_v8_0_audio_init()
1436 (adev->asic_type == CHIP_MULLINS)) /* KB/ML: 2 streams, 3 endpoints */ in dce_v8_0_audio_init()
1438 else if ((adev->asic_type == CHIP_BONAIRE) || in dce_v8_0_audio_init()
1439 (adev->asic_type == CHIP_HAWAII))/* BN/HW: 6 streams, 7 endpoints */ in dce_v8_0_audio_init()
2194 if ((adev->asic_type == CHIP_KABINI) || in dce_v8_0_pick_pll()
2195 (adev->asic_type == CHIP_MULLINS)) { in dce_v8_0_pick_pll()
2531 if ((adev->asic_type == CHIP_KAVERI) || in dce_v8_0_crtc_disable()
2532 (adev->asic_type == CHIP_BONAIRE) || in dce_v8_0_crtc_disable()
[all …]
Damdgpu_kms.c647 if (adev->asic_type < CHIP_POLARIS10) { in amdgpu_info_ioctl()
854 if (adev->asic_type != CHIP_RAVEN) { in amdgpu_driver_postclose_kms()
1086 if (adev->asic_type == CHIP_KAVERI || in amdgpu_debugfs_firmware_info()
1087 (adev->asic_type > CHIP_TOPAZ && adev->asic_type != CHIP_STONEY)) { in amdgpu_debugfs_firmware_info()
Datombios_crtc.c501 if (adev->asic_type == CHIP_TAHITI || in amdgpu_atombios_crtc_set_disp_eng_pll()
502 adev->asic_type == CHIP_PITCAIRN || in amdgpu_atombios_crtc_set_disp_eng_pll()
503 adev->asic_type == CHIP_VERDE || in amdgpu_atombios_crtc_set_disp_eng_pll()
504 adev->asic_type == CHIP_OLAND) in amdgpu_atombios_crtc_set_disp_eng_pll()
Dcik.c755 switch (adev->asic_type) { in cik_init_golden_registers()
1668 switch (adev->asic_type) { in cik_common_early_init()
1772 if (adev->asic_type == CHIP_KABINI) { in cik_common_early_init()
1895 switch (adev->asic_type) { in cik_set_ip_blocks()
Dgfx_v7_0.c907 switch (adev->asic_type) { in gfx_v7_0_init_microcode()
958 if (adev->asic_type == CHIP_KAVERI) { in gfx_v7_0_init_microcode()
1050 switch (adev->asic_type) { in gfx_v7_0_tiling_mode_table_init()
1637 switch (adev->asic_type) { in gfx_v7_0_raster_config()
1661 DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); in gfx_v7_0_raster_config()
2538 switch (adev->asic_type) { in gfx_v7_0_cp_gfx_start()
2596 if (adev->asic_type != CHIP_HAWAII) in gfx_v7_0_cp_gfx_resume()
2741 if (adev->asic_type == CHIP_KAVERI) { in gfx_v7_0_cp_compute_load_microcode()
3317 if (adev->asic_type == CHIP_KAVERI) { in gfx_v7_0_rlc_init()
3611 if (adev->asic_type == CHIP_BONAIRE) in gfx_v7_0_rlc_resume()
[all …]
Dgfx_v6_0.c318 switch (adev->asic_type) { in gfx_v6_0_init_microcode()
415 if (adev->asic_type == CHIP_VERDE) { in gfx_v6_0_tiling_mode_table_init()
639 } else if (adev->asic_type == CHIP_OLAND) { in gfx_v6_0_tiling_mode_table_init()
826 } else if (adev->asic_type == CHIP_HAINAN) { in gfx_v6_0_tiling_mode_table_init()
1050 } else if ((adev->asic_type == CHIP_TAHITI) || (adev->asic_type == CHIP_PITCAIRN)) { in gfx_v6_0_tiling_mode_table_init()
1275 DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); in gfx_v6_0_tiling_mode_table_init()
1321 switch (adev->asic_type) { in gfx_v6_0_raster_config()
1346 DRM_ERROR("unknown asic: 0x%x\n", adev->asic_type); in gfx_v6_0_raster_config()
1562 switch (adev->asic_type) { in gfx_v6_0_gpu_init()
2966 switch (adev->asic_type) { in gfx_v6_0_get_csb_buffer()
Ddce_virtual.c450 switch (adev->asic_type) { in dce_virtual_hw_init()
487 DRM_ERROR("Virtual display unsupported ASIC type: 0x%X\n", adev->asic_type); in dce_virtual_hw_init()
Damdgpu_amdkfd.c78 switch (adev->asic_type) { in amdgpu_amdkfd_device_probe()
/drivers/pci/hotplug/
Dsgi_hotplug.c135 u32 asic_type; in sn_pci_bus_valid() local
140 asic_type = pcibus_info->pbi_buscommon.bs_asic_type; in sn_pci_bus_valid()
141 if (asic_type == PCIIO_ASIC_TYPE_TIOCA) in sn_pci_bus_valid()

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