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Searched refs:length_dw (Results 1 – 25 of 53) sorted by relevance

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/drivers/gpu/drm/radeon/
Dsi_dma.c79 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pages()
81 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pages()
82 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pages()
83 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pages()
84 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pages()
120 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pages()
121 ib->ptr[ib->length_dw++] = pe; in si_dma_vm_write_pages()
122 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_write_pages()
133 ib->ptr[ib->length_dw++] = value; in si_dma_vm_write_pages()
134 ib->ptr[ib->length_dw++] = upper_32_bits(value); in si_dma_vm_write_pages()
[all …]
Dradeon_vce.c363 ib.length_dw = 0; in radeon_vce_get_create_msg()
364 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000c); /* len */ in radeon_vce_get_create_msg()
365 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); /* session cmd */ in radeon_vce_get_create_msg()
366 ib.ptr[ib.length_dw++] = cpu_to_le32(handle); in radeon_vce_get_create_msg()
368 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000030); /* len */ in radeon_vce_get_create_msg()
369 ib.ptr[ib.length_dw++] = cpu_to_le32(0x01000001); /* create cmd */ in radeon_vce_get_create_msg()
370 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000000); in radeon_vce_get_create_msg()
371 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000042); in radeon_vce_get_create_msg()
372 ib.ptr[ib.length_dw++] = cpu_to_le32(0x0000000a); in radeon_vce_get_create_msg()
373 ib.ptr[ib.length_dw++] = cpu_to_le32(0x00000001); in radeon_vce_get_create_msg()
[all …]
Dni_dma.c146 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in cayman_dma_ring_ib_execute()
327 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in cayman_dma_vm_copy_pages()
329 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cayman_dma_vm_copy_pages()
330 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cayman_dma_vm_copy_pages()
331 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_copy_pages()
332 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in cayman_dma_vm_copy_pages()
368 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, in cayman_dma_vm_write_pages()
370 ib->ptr[ib->length_dw++] = pe; in cayman_dma_vm_write_pages()
371 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in cayman_dma_vm_write_pages()
382 ib->ptr[ib->length_dw++] = value; in cayman_dma_vm_write_pages()
[all …]
Dradeon_cs.c89 p->nrelocs = chunk->length_dw / 4; in radeon_cs_parser_relocs()
311 p->chunks[i].length_dw = user_chunk.length_dw; in radeon_cs_parser_init()
318 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
324 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
330 if (p->chunks[i].length_dw == 0) in radeon_cs_parser_init()
334 size = p->chunks[i].length_dw; in radeon_cs_parser_init()
355 if (p->chunks[i].length_dw > 1) in radeon_cs_parser_init()
357 if (p->chunks[i].length_dw > 2) in radeon_cs_parser_init()
548 if (parser->const_ib.length_dw) { in radeon_cs_ib_vm_chunk()
614 if (ib_chunk->length_dw > RADEON_IB_VM_MAX_SIZE) { in radeon_cs_ib_fill()
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Dcik_sdma.c157 radeon_ring_write(ring, ib->length_dw); in cik_sdma_ring_ib_execute()
732 ib.length_dw = 5; in cik_sdma_ib_test()
813 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pages()
815 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pages()
816 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pages()
817 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pages()
818 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pages()
819 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pages()
820 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pages()
856 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pages()
[all …]
Dradeon_vm.c410 ib.length_dw = 0; in radeon_vm_clear_bo()
414 WARN_ON(ib.length_dw > 64); in radeon_vm_clear_bo()
664 ib.length_dw = 0; in radeon_vm_update_page_directory()
701 if (ib.length_dw != 0) { in radeon_vm_update_page_directory()
705 WARN_ON(ib.length_dw > ndw); in radeon_vm_update_page_directory()
1002 ib.length_dw = 0; in radeon_vm_bo_update()
1020 WARN_ON(ib.length_dw > ndw); in radeon_vm_bo_update()
Dradeon_uvd.c585 if (idx >= relocs_chunk->length_dw) { in radeon_uvd_cs_reloc()
587 idx, relocs_chunk->length_dw); in radeon_uvd_cs_reloc()
700 if (p->chunk_ib->length_dw % 16) { in radeon_uvd_cs_parse()
702 p->chunk_ib->length_dw); in radeon_uvd_cs_parse()
730 } while (p->idx < p->chunk_ib->length_dw); in radeon_uvd_cs_parse()
761 ib.length_dw = 16; in radeon_uvd_send_msg()
Dr600_dma.c363 ib.length_dw = 4; in r600_dma_ib_test()
427 radeon_ring_write(ring, (ib->length_dw << 16) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in r600_dma_ring_ib_execute()
Devergreen_dma.c90 radeon_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in evergreen_dma_ring_ib_execute()
Dradeon_ib.c128 if (!ib->length_dw || !ring->ready) { in radeon_ib_schedule()
Dradeon_trace.h41 __entry->dw = p->chunk_ib->length_dw;
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_vce.c425 ib->length_dw = 0; in amdgpu_vce_get_create_msg()
426 ib->ptr[ib->length_dw++] = 0x0000000c; /* len */ in amdgpu_vce_get_create_msg()
427 ib->ptr[ib->length_dw++] = 0x00000001; /* session cmd */ in amdgpu_vce_get_create_msg()
428 ib->ptr[ib->length_dw++] = handle; in amdgpu_vce_get_create_msg()
431 ib->ptr[ib->length_dw++] = 0x00000040; /* len */ in amdgpu_vce_get_create_msg()
433 ib->ptr[ib->length_dw++] = 0x00000030; /* len */ in amdgpu_vce_get_create_msg()
434 ib->ptr[ib->length_dw++] = 0x01000001; /* create cmd */ in amdgpu_vce_get_create_msg()
435 ib->ptr[ib->length_dw++] = 0x00000000; in amdgpu_vce_get_create_msg()
436 ib->ptr[ib->length_dw++] = 0x00000042; in amdgpu_vce_get_create_msg()
437 ib->ptr[ib->length_dw++] = 0x0000000a; in amdgpu_vce_get_create_msg()
[all …]
Damdgpu_vcn.c321 ib->length_dw = 16; in amdgpu_vcn_dec_send_msg()
535 ib->length_dw = 0; in amdgpu_vcn_enc_get_create_msg()
536 ib->ptr[ib->length_dw++] = 0x00000018; in amdgpu_vcn_enc_get_create_msg()
537 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in amdgpu_vcn_enc_get_create_msg()
538 ib->ptr[ib->length_dw++] = handle; in amdgpu_vcn_enc_get_create_msg()
539 ib->ptr[ib->length_dw++] = upper_32_bits(dummy); in amdgpu_vcn_enc_get_create_msg()
540 ib->ptr[ib->length_dw++] = dummy; in amdgpu_vcn_enc_get_create_msg()
541 ib->ptr[ib->length_dw++] = 0x0000000b; in amdgpu_vcn_enc_get_create_msg()
543 ib->ptr[ib->length_dw++] = 0x00000014; in amdgpu_vcn_enc_get_create_msg()
544 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */ in amdgpu_vcn_enc_get_create_msg()
[all …]
Dsi_dma.c73 amdgpu_ring_write(ring, (ib->length_dw << 12) | (upper_32_bits(ib->gpu_addr) & 0xFF)); in si_dma_ring_emit_ib()
304 ib.length_dw = 4; in si_dma_ring_test_ib()
351 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_COPY, in si_dma_vm_copy_pte()
353 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_copy_pte()
354 ib->ptr[ib->length_dw++] = lower_32_bits(src); in si_dma_vm_copy_pte()
355 ib->ptr[ib->length_dw++] = upper_32_bits(pe) & 0xff; in si_dma_vm_copy_pte()
356 ib->ptr[ib->length_dw++] = upper_32_bits(src) & 0xff; in si_dma_vm_copy_pte()
376 ib->ptr[ib->length_dw++] = DMA_PACKET(DMA_PACKET_WRITE, 0, 0, 0, ndw); in si_dma_vm_write_pte()
377 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in si_dma_vm_write_pte()
378 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in si_dma_vm_write_pte()
[all …]
Dcik_sdma.c234 amdgpu_ring_write(ring, ib->length_dw); in cik_sdma_ring_emit_ib()
711 ib.length_dw = 5; in cik_sdma_ring_test_ib()
758 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_COPY, in cik_sdma_vm_copy_pte()
760 ib->ptr[ib->length_dw++] = bytes; in cik_sdma_vm_copy_pte()
761 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in cik_sdma_vm_copy_pte()
762 ib->ptr[ib->length_dw++] = lower_32_bits(src); in cik_sdma_vm_copy_pte()
763 ib->ptr[ib->length_dw++] = upper_32_bits(src); in cik_sdma_vm_copy_pte()
764 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in cik_sdma_vm_copy_pte()
765 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in cik_sdma_vm_copy_pte()
785 ib->ptr[ib->length_dw++] = SDMA_PACKET(SDMA_OPCODE_WRITE, in cik_sdma_vm_write_pte()
[all …]
Dsdma_v2_4.c261 amdgpu_ring_write(ring, ib->length_dw); in sdma_v2_4_ring_emit_ib()
700 ib.length_dw = 8; in sdma_v2_4_ring_test_ib()
748 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v2_4_vm_copy_pte()
750 ib->ptr[ib->length_dw++] = bytes; in sdma_v2_4_vm_copy_pte()
751 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v2_4_vm_copy_pte()
752 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v2_4_vm_copy_pte()
753 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v2_4_vm_copy_pte()
754 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v2_4_vm_copy_pte()
755 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v2_4_vm_copy_pte()
775 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v2_4_vm_write_pte()
[all …]
Dsdma_v4_0.c358 amdgpu_ring_write(ring, ib->length_dw); in sdma_v4_0_ring_emit_ib()
976 ib.length_dw = 8; in sdma_v4_0_ring_test_ib()
1024 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v4_0_vm_copy_pte()
1026 ib->ptr[ib->length_dw++] = bytes - 1; in sdma_v4_0_vm_copy_pte()
1027 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v4_0_vm_copy_pte()
1028 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v4_0_vm_copy_pte()
1029 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v4_0_vm_copy_pte()
1030 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1031 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v4_0_vm_copy_pte()
1053 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v4_0_vm_write_pte()
[all …]
Dsdma_v3_0.c427 amdgpu_ring_write(ring, ib->length_dw); in sdma_v3_0_ring_emit_ib()
944 ib.length_dw = 8; in sdma_v3_0_ring_test_ib()
991 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_COPY) | in sdma_v3_0_vm_copy_pte()
993 ib->ptr[ib->length_dw++] = bytes; in sdma_v3_0_vm_copy_pte()
994 ib->ptr[ib->length_dw++] = 0; /* src/dst endian swap */ in sdma_v3_0_vm_copy_pte()
995 ib->ptr[ib->length_dw++] = lower_32_bits(src); in sdma_v3_0_vm_copy_pte()
996 ib->ptr[ib->length_dw++] = upper_32_bits(src); in sdma_v3_0_vm_copy_pte()
997 ib->ptr[ib->length_dw++] = lower_32_bits(pe); in sdma_v3_0_vm_copy_pte()
998 ib->ptr[ib->length_dw++] = upper_32_bits(pe); in sdma_v3_0_vm_copy_pte()
1018 ib->ptr[ib->length_dw++] = SDMA_PKT_HEADER_OP(SDMA_OP_WRITE) | in sdma_v3_0_vm_write_pte()
[all …]
Duvd_v7_0.c225 ib->length_dw = 0; in uvd_v7_0_enc_get_create_msg()
226 ib->ptr[ib->length_dw++] = 0x00000018; in uvd_v7_0_enc_get_create_msg()
227 ib->ptr[ib->length_dw++] = 0x00000001; /* session info */ in uvd_v7_0_enc_get_create_msg()
228 ib->ptr[ib->length_dw++] = handle; in uvd_v7_0_enc_get_create_msg()
229 ib->ptr[ib->length_dw++] = 0x00000000; in uvd_v7_0_enc_get_create_msg()
230 ib->ptr[ib->length_dw++] = upper_32_bits(dummy); in uvd_v7_0_enc_get_create_msg()
231 ib->ptr[ib->length_dw++] = dummy; in uvd_v7_0_enc_get_create_msg()
233 ib->ptr[ib->length_dw++] = 0x00000014; in uvd_v7_0_enc_get_create_msg()
234 ib->ptr[ib->length_dw++] = 0x00000002; /* task info */ in uvd_v7_0_enc_get_create_msg()
235 ib->ptr[ib->length_dw++] = 0x0000001c; in uvd_v7_0_enc_get_create_msg()
[all …]
Dgfx_v8_0.c826 ib.length_dw = 3; in gfx_v8_0_ring_test_ib()
1539 ib.length_dw = 0; in gfx_v8_0_do_edc_gpr_workarounds()
1544 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 1); in gfx_v8_0_do_edc_gpr_workarounds()
1545 ib.ptr[ib.length_dw++] = vgpr_init_regs[i] - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1546 ib.ptr[ib.length_dw++] = vgpr_init_regs[i + 1]; in gfx_v8_0_do_edc_gpr_workarounds()
1550 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_SET_SH_REG, 2); in gfx_v8_0_do_edc_gpr_workarounds()
1551 ib.ptr[ib.length_dw++] = mmCOMPUTE_PGM_LO - PACKET3_SET_SH_REG_START; in gfx_v8_0_do_edc_gpr_workarounds()
1552 ib.ptr[ib.length_dw++] = lower_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1553 ib.ptr[ib.length_dw++] = upper_32_bits(gpu_addr); in gfx_v8_0_do_edc_gpr_workarounds()
1556 ib.ptr[ib.length_dw++] = PACKET3(PACKET3_DISPATCH_DIRECT, 3); in gfx_v8_0_do_edc_gpr_workarounds()
[all …]
Damdgpu_cs.c128 p->chunks[i].length_dw = user_chunk.length_dw; in amdgpu_cs_parser_init()
130 size = p->chunks[i].length_dw; in amdgpu_cs_parser_init()
152 if (p->chunks[i].length_dw * sizeof(uint32_t) < size) { in amdgpu_cs_parser_init()
982 ib->length_dw = chunk_ib->ib_bytes / 4; in amdgpu_cs_ib_fill()
1005 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_fence_dep()
1067 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_syncobj_in_dep()
1085 num_deps = chunk->length_dw * 4 / in amdgpu_cs_process_syncobj_out_dep()
Damdgpu_uvd.c829 if (ctx->idx >= ib->length_dw) { in amdgpu_uvd_cs_reg()
872 for (ctx->idx = 0 ; ctx->idx < ib->length_dw; ) { in amdgpu_uvd_cs_packets()
917 if (ib->length_dw % 16) { in amdgpu_uvd_ring_parse_cs()
919 ib->length_dw); in amdgpu_uvd_ring_parse_cs()
1013 ib->length_dw = 16; in amdgpu_uvd_send_msg()
Damdgpu_ring.c109 while (ib->length_dw & ring->funcs->align_mask) in amdgpu_ring_generic_pad_ib()
110 ib->ptr[ib->length_dw++] = ring->funcs->nop; in amdgpu_ring_generic_pad_ib()
Dsoc15.c318 u32 i, length_dw; in soc15_read_bios_from_rom() local
329 length_dw = ALIGN(length_bytes, 4) / 4; in soc15_read_bios_from_rom()
334 for (i = 0; i < length_dw; i++) in soc15_read_bios_from_rom()
/drivers/net/ethernet/qlogic/qed/
Dqed_hw.c465 le16_to_cpu(p_command->length_dw), in qed_dmae_post_command()
480 le16_to_cpu(p_command->length_dw), in qed_dmae_post_command()
611 u32 length_dw) in qed_dmae_execute_sub_operation() argument
629 length_dw * sizeof(u32)); in qed_dmae_execute_sub_operation()
650 cmd->length_dw = cpu_to_le16((u16)length_dw); in qed_dmae_execute_sub_operation()
659 src_addr, dst_addr, length_dw); in qed_dmae_execute_sub_operation()
666 length_dw * sizeof(u32)); in qed_dmae_execute_sub_operation()

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