Home
last modified time | relevance | path

Searched refs:reg0 (Results 1 – 25 of 40) sorted by relevance

12

/drivers/s390/crypto/
Dap_asm.h21 register unsigned long reg0 asm ("0") = AP_MKQID(0, 0); in ap_instructions_available()
30 : "+d" (reg0), "+d" (reg1), "+d" (reg2) : : "cc"); in ap_instructions_available()
43 register unsigned long reg0 asm ("0") = qid; in ap_tapq()
48 : "+d" (reg0), "=d" (reg1), "+d" (reg2) : : "cc"); in ap_tapq()
62 register unsigned long reg0 asm ("0") = qid | 0x01000000UL; in ap_rapq()
68 : "+d" (reg0), "=d" (reg1), "+d" (reg2) : : "cc"); in ap_rapq()
84 register unsigned long reg0 asm ("0") = qid | (3UL << 24); in ap_aqic()
91 : "+d" (reg0), "+d" (reg1_in), "=d" (reg1_out), "+d" (reg2) in ap_aqic()
104 register unsigned long reg0 asm ("0") = 0x04000000UL; in ap_qci()
113 : "+d" (reg0), "+d" (reg1), "+d" (reg2) in ap_qci()
[all …]
/drivers/media/dvb-frontends/
Dves1820.c42 u8 reg0; member
94 u8 reg0, enum fe_spectral_inversion inversion) in ves1820_setup_reg0() argument
96 reg0 |= state->reg0 & 0x62; in ves1820_setup_reg0()
99 if (!state->config->invert) reg0 |= 0x20; in ves1820_setup_reg0()
100 else reg0 &= ~0x20; in ves1820_setup_reg0()
102 if (!state->config->invert) reg0 &= ~0x20; in ves1820_setup_reg0()
103 else reg0 |= 0x20; in ves1820_setup_reg0()
106 ves1820_writereg(state, 0x00, reg0 & 0xfe); in ves1820_setup_reg0()
107 ves1820_writereg(state, 0x00, reg0 | 0x01); in ves1820_setup_reg0()
109 state->reg0 = reg0; in ves1820_setup_reg0()
[all …]
Da8293.c30 u8 reg0, reg1; in a8293_set_voltage() local
37 reg0 = 0x10; in a8293_set_voltage()
41 reg0 = 0x31; in a8293_set_voltage()
45 reg0 = 0x38; in a8293_set_voltage()
51 if (reg0 != dev->reg[0]) { in a8293_set_voltage()
52 ret = i2c_master_send(client, &reg0, 1); in a8293_set_voltage()
55 dev->reg[0] = reg0; in a8293_set_voltage()
Dtda10021.c43 u8 reg0; member
131 static int tda10021_setup_reg0(struct tda10021_state *state, u8 reg0, in tda10021_setup_reg0() argument
134 reg0 |= state->reg0 & 0x63; in tda10021_setup_reg0()
137 reg0 &= ~0x20; in tda10021_setup_reg0()
139 reg0 |= 0x20; in tda10021_setup_reg0()
141 _tda10021_writereg (state, 0x00, reg0 & 0xfe); in tda10021_setup_reg0()
142 _tda10021_writereg (state, 0x00, reg0 | 0x01); in tda10021_setup_reg0()
144 state->reg0 = reg0; in tda10021_setup_reg0()
406 …p->inversion = ((state->reg0 & 0x20) == 0x20) ^ (state->config->invert != 0) ? INVERSION_ON : INVE… in tda10021_get_frontend()
407 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in tda10021_get_frontend()
[all …]
Dtua6100.c51 u8 reg0[] = { 0x00, 0x00 }; in tua6100_sleep() local
52 struct i2c_msg msg = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; in tua6100_sleep()
71 u8 reg0[] = { 0x00, 0x00 }; in tua6100_set_params() local
74 struct i2c_msg msg0 = { .addr = priv->i2c_address, .flags = 0, .buf = reg0, .len = 2 }; in tua6100_set_params()
84 reg0[1] = 0x03; in tua6100_set_params()
86 reg0[1] = 0x07; in tua6100_set_params()
Dtda10023.c50 u8 reg0; member
156 static int tda10023_setup_reg0 (struct tda10023_state* state, u8 reg0) in tda10023_setup_reg0() argument
158 reg0 |= state->reg0 & 0x63; in tda10023_setup_reg0()
160 tda10023_writereg (state, 0x00, reg0 & 0xfe); in tda10023_setup_reg0()
161 tda10023_writereg (state, 0x00, reg0 | 0x01); in tda10023_setup_reg0()
163 state->reg0 = reg0; in tda10023_setup_reg0()
478 p->modulation = ((state->reg0 >> 2) & 7) + QAM_16; in tda10023_get_frontend()
541 state->reg0 = REG0_INIT_VAL; in tda10023_attach()
Dm88rs2000.c253 u8 reg0, reg1; in m88rs2000_send_diseqc_burst() local
257 reg0 = m88rs2000_readreg(state, 0xb1); in m88rs2000_send_diseqc_burst()
261 m88rs2000_writereg(state, 0xb1, reg0); in m88rs2000_send_diseqc_burst()
271 u8 reg0, reg1; in m88rs2000_set_tone() local
273 reg0 = m88rs2000_readreg(state, 0xb1); in m88rs2000_set_tone()
280 reg0 |= 0x4; in m88rs2000_set_tone()
281 reg0 &= 0xbc; in m88rs2000_set_tone()
290 m88rs2000_writereg(state, 0xb1, reg0); in m88rs2000_set_tone()
Dstv6110.c403 u8 reg0[] = { 0x00, 0x07, 0x11, 0xdc, 0x85, 0x17, 0x01, 0xe6, 0x1e }; in stv6110_attach() local
409 .buf = reg0, in stv6110_attach()
416 reg0[2] &= ~0xc0; in stv6110_attach()
417 reg0[2] |= (config->clk_div << 6); in stv6110_attach()
440 memcpy(&priv->regs, &reg0[1], 8); in stv6110_attach()
/drivers/sbus/char/
Djsflash.c493 struct linux_prom_registers reg0; in jsflash_init() local
499 (char *)&reg0, sizeof(reg0)) == -1) { in jsflash_init()
503 if (reg0.which_io != 0) { in jsflash_init()
505 reg0.which_io, reg0.phys_addr); in jsflash_init()
513 if ((reg0.phys_addr >> 24) != 0x20) { in jsflash_init()
515 reg0.which_io, reg0.phys_addr); in jsflash_init()
519 if ((int)reg0.reg_size <= 0) { in jsflash_init()
520 printk("jsflash: bad size 0x%x\n", (int)reg0.reg_size); in jsflash_init()
531 reg0.which_io = 0; in jsflash_init()
532 reg0.phys_addr = 0x20400000; in jsflash_init()
[all …]
/drivers/net/ethernet/netronome/nfp/bpf/
Dverifier.c81 const struct bpf_reg_state *reg0 = cur_regs(env) + BPF_REG_0; in nfp_bpf_check_exit() local
87 if (!(reg0->type == SCALAR_VALUE && tnum_is_const(reg0->var_off))) { in nfp_bpf_check_exit()
90 tnum_strn(tn_buf, sizeof(tn_buf), reg0->var_off); in nfp_bpf_check_exit()
92 reg0->type, tn_buf); in nfp_bpf_check_exit()
96 imm = reg0->var_off.value; in nfp_bpf_check_exit()
99 reg0->type, imm); in nfp_bpf_check_exit()
107 reg0->type, imm); in nfp_bpf_check_exit()
/drivers/clk/meson/
Dgxbb-aoclk-32k.c79 u32 reg0, reg1; in aoclk_cec_32k_recalc_rate() local
81 regmap_read(cec_32k->regmap, AO_RTC_ALT_CLK_CNTL0, &reg0); in aoclk_cec_32k_recalc_rate()
87 if (reg0 & CLK_CNTL0_DUALDIV_EN) { in aoclk_cec_32k_recalc_rate()
90 n1 = FIELD_GET(CLK_CNTL0_N1_MASK, reg0) + 1; in aoclk_cec_32k_recalc_rate()
91 n2 = FIELD_GET(CLK_CNTL0_N2_MASK, reg0) + 1; in aoclk_cec_32k_recalc_rate()
105 n1 = FIELD_GET(CLK_CNTL0_N1_MASK, reg0) + 1; in aoclk_cec_32k_recalc_rate()
/drivers/tee/optee/
Doptee_private.h172 static inline void *reg_pair_to_ptr(u32 reg0, u32 reg1) in reg_pair_to_ptr() argument
174 return (void *)(unsigned long)(((u64)reg0 << 32) | reg1); in reg_pair_to_ptr()
177 static inline void reg_pair_from_64(u32 *reg0, u32 *reg1, u64 val) in reg_pair_from_64() argument
179 *reg0 = val >> 32; in reg_pair_from_64()
/drivers/pci/host/
Dpcie-altera.c93 u32 reg0; member
135 cra_writel(pcie, tlp_rp_regdata->reg0, RP_TX_REG0); in tlp_write_tx()
161 u32 reg0, reg1; in tlp_read_packet() local
171 reg0 = cra_readl(pcie, RP_RXCPL_REG0); in tlp_read_packet()
184 *value = reg0; in tlp_read_packet()
200 tlp_rp_regdata.reg0 = headers[0]; in tlp_write_packet()
206 tlp_rp_regdata.reg0 = headers[2]; in tlp_write_packet()
211 tlp_rp_regdata.reg0 = data; in tlp_write_packet()
214 tlp_rp_regdata.reg0 = headers[2]; in tlp_write_packet()
/drivers/gpu/drm/gma500/
Dintel_gmbus.c261 GMBUS_REG_WRITE(GMBUS0 + reg_offset, bus->reg0); in gmbus_xfer()
349 bus->reg0 & 0xff, bus->adapter.name); in gmbus_xfer()
353 bus->force_bit = intel_gpio_create(dev_priv, bus->reg0 & 0xff); in gmbus_xfer()
428 bus->reg0 = i | GMBUS_RATE_100KHZ; in gma_intel_setup_gmbus()
458 bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | (speed << 8); in gma_intel_gmbus_set_speed()
469 bus->reg0 & 0xff); in gma_intel_gmbus_force_bit()
/drivers/net/ethernet/8390/
Dwd.c260 int reg0 = inb(ioaddr); in wd_probe1() local
261 if (reg0 == 0xff || reg0 == 0) { in wd_probe1()
270 dev->mem_start = ((reg0&0x3f) << 13) + (high_addr_bits << 19); in wd_probe1()
377 ei_status.reg0 = ((dev->mem_start>>13) & 0x3f) | WD_MEMENB; in wd_open()
382 outb(ei_status.reg0, ioaddr); /* WD_CMDREG */ in wd_open()
492 outb(ei_status.reg0 & ~WD_MEMENB, wd_cmdreg); in wd_close()
Dne2k-pci.c96 #define ne2k_flags reg0
224 int irq, reg0, chip_idx = ent->driver_data; in ne2k_pci_init_one() local
257 reg0 = inb(ioaddr); in ne2k_pci_init_one()
258 if (reg0 == 0xFF) in ne2k_pci_init_one()
270 outb(reg0, ioaddr); in ne2k_pci_init_one()
Dne.c302 int reg0, ret; in ne_probe1() local
309 reg0 = inb_p(ioaddr); in ne_probe1()
310 if (reg0 == 0xFF) { in ne_probe1()
324 outb_p(reg0, ioaddr); in ne_probe1()
Dax88796.c119 int reg0; in ax_initial_check() local
122 reg0 = ei_inb(ioaddr); in ax_initial_check()
123 if (reg0 == 0xFF) in ax_initial_check()
132 ei_outb(reg0, ioaddr); in ax_initial_check()
/drivers/net/wireless/ath/ath10k/
Dspectral.c82 u32 reg0, reg1; in ath10k_spectral_process_fft() local
93 reg0 = __le32_to_cpu(fftr->reg0); in ath10k_spectral_process_fft()
130 fft_sample->max_index = MS(reg0, SEARCH_FFT_REPORT_REG0_PEAK_SIDX); in ath10k_spectral_process_fft()
133 total_gain_db = MS(reg0, SEARCH_FFT_REPORT_REG0_TOTAL_GAIN_DB); in ath10k_spectral_process_fft()
134 base_pwr_db = MS(reg0, SEARCH_FFT_REPORT_REG0_BASE_PWR_DB); in ath10k_spectral_process_fft()
143 chain_idx = MS(reg0, SEARCH_FFT_REPORT_REG0_FFT_CHN_IDX); in ath10k_spectral_process_fft()
/drivers/media/pci/zoran/
Dzoran_procfs.c91 int i = 0, reg0, reg, val; in setparam() local
95 reg = reg0 = btread(zr67[i].reg); in setparam()
106 ZR_DEVNAME(zr), zr67[i].reg, reg0, reg, in setparam()
/drivers/gpu/drm/i915/
Dintel_i2c.c485 I915_WRITE_FW(GMBUS0, bus->reg0); in do_gmbus_xfer()
575 bus->adapter.name, bus->reg0 & 0xff); in do_gmbus_xfer()
710 bus->reg0 = pin | GMBUS_RATE_100KHZ; in intel_setup_gmbus()
751 bus->reg0 = (bus->reg0 & ~(0x3 << 8)) | speed; in intel_gmbus_set_speed()
/drivers/net/ethernet/adaptec/
Dstarfire.c1076 u16 reg0; in check_duplex() local
1089 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in check_duplex()
1092 reg0 |= BMCR_ANENABLE | BMCR_ANRESTART; in check_duplex()
1094 reg0 &= ~(BMCR_ANENABLE | BMCR_ANRESTART); in check_duplex()
1096 reg0 |= BMCR_SPEED100; in check_duplex()
1098 reg0 |= BMCR_FULLDPLX; in check_duplex()
1104 mdio_write(dev, np->phys[0], MII_BMCR, reg0); in check_duplex()
1628 u16 reg0, reg1, reg4, reg5; in netdev_media_change() local
1636 reg0 = mdio_read(dev, np->phys[0], MII_BMCR); in netdev_media_change()
1641 if (reg0 & BMCR_ANENABLE) { in netdev_media_change()
[all …]
/drivers/edac/
Damd64_edac.c939 int reg0 = base_reg0 + (cs * 4); in read_dct_base_mask() local
945 if (!amd_smn_read(pvt->mc_node_id, reg0, base0)) in read_dct_base_mask()
947 cs, *base0, reg0); in read_dct_base_mask()
953 if (!amd64_read_dct_pci_cfg(pvt, 0, reg0, base0)) in read_dct_base_mask()
955 cs, *base0, reg0); in read_dct_base_mask()
960 if (!amd64_read_dct_pci_cfg(pvt, 1, reg0, base1)) in read_dct_base_mask()
963 : reg0); in read_dct_base_mask()
968 int reg0 = mask_reg0 + (cs * 4); in read_dct_base_mask() local
974 if (!amd_smn_read(pvt->mc_node_id, reg0, mask0)) in read_dct_base_mask()
976 cs, *mask0, reg0); in read_dct_base_mask()
[all …]
/drivers/net/ethernet/qlogic/qed/
Dqed_hsi.h327 __le32 reg0; member
451 __le32 reg0; member
1363 __le32 reg0; member
1401 __le32 reg0; member
4661 __le32 reg0; member
4834 __le32 reg0; member
4916 __le32 reg0; member
5702 __le32 reg0; member
5742 __le32 reg0; member
6779 __le32 reg0; member
[all …]
/drivers/gpu/drm/r128/
Dr128_drv.h410 #define CCE_PACKET1(reg0, reg1) (R128_CCE_PACKET1 | \ argument
411 (((reg1) >> 2) << 11) | ((reg0) >> 2))

12