| /drivers/gpu/drm/nouveau/nvkm/engine/disp/ |
| D | hdmigt215.c | 35 const u32 soff = nv50_ior_base(ior); in gt215_hdmi_ctrl() local
43 nvkm_mask(device, 0x61c5a4 + soff, 0x40000000, 0x00000000); in gt215_hdmi_ctrl()
44 nvkm_mask(device, 0x61c53c + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl()
45 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl()
46 nvkm_mask(device, 0x61c500 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl()
51 nvkm_mask(device, 0x61c520 + soff, 0x00000001, 0x00000000); in gt215_hdmi_ctrl()
53 nvkm_wr32(device, 0x61c528 + soff, avi_infoframe.header); in gt215_hdmi_ctrl()
54 nvkm_wr32(device, 0x61c52c + soff, avi_infoframe.subpack0_low); in gt215_hdmi_ctrl()
55 nvkm_wr32(device, 0x61c530 + soff, avi_infoframe.subpack0_high); in gt215_hdmi_ctrl()
56 nvkm_wr32(device, 0x61c534 + soff, avi_infoframe.subpack1_low); in gt215_hdmi_ctrl()
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| D | sorg94.c | 52 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_audio_sym() local
53 nvkm_mask(device, 0x61c1e8 + soff, 0x0000ffff, h); in g94_sor_dp_audio_sym()
54 nvkm_mask(device, 0x61c1ec + soff, 0x00ffffff, v); in g94_sor_dp_audio_sym()
87 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_power() local
95 nvkm_mask(device, 0x61c034 + soff, 0x80000000, 0x80000000); in g94_sor_dp_power()
97 if (!(nvkm_rd32(device, 0x61c034 + soff) & 0x80000000)) in g94_sor_dp_power()
106 const u32 soff = nv50_ior_base(sor); in g94_sor_dp_links() local
117 nvkm_mask(device, 0x614300 + soff, 0x000c0000, clksor); in g94_sor_dp_links()
126 const u32 soff = nv50_ior_base(sor); in g94_sor_war_needed() local
128 switch (nvkm_rd32(device, 0x614300 + soff) & 0x00030000) { in g94_sor_war_needed()
[all …]
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| D | sornv50.c | 33 const u32 soff = nv50_ior_base(sor); in nv50_sor_clock() local
34 nvkm_mask(device, 0x614300 + soff, 0x00000707, (div << 8) | div); in nv50_sor_clock()
38 nv50_sor_power_wait(struct nvkm_device *device, u32 soff) in nv50_sor_power_wait() argument
41 if (!(nvkm_rd32(device, 0x61c004 + soff) & 0x80000000)) in nv50_sor_power_wait()
51 const u32 soff = nv50_ior_base(sor); in nv50_sor_power() local
56 nv50_sor_power_wait(device, soff); in nv50_sor_power()
57 nvkm_mask(device, 0x61c004 + soff, field, state); in nv50_sor_power()
58 nv50_sor_power_wait(device, soff); in nv50_sor_power()
61 if (!(nvkm_rd32(device, 0x61c030 + soff) & 0x10000000)) in nv50_sor_power()
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| D | hdagt215.c | 30 const u32 soff = ior->id * 0x800; in gt215_hda_eld() local
34 nvkm_wr32(device, 0x61c440 + soff, (i << 8) | data[i]); in gt215_hda_eld()
36 nvkm_wr32(device, 0x61c440 + soff, (i << 8)); in gt215_hda_eld()
37 nvkm_mask(device, 0x61c448 + soff, 0x80000002, 0x80000002); in gt215_hda_eld()
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| D | hdagf119.c | 30 const u32 soff = 0x030 * ior->id; in gf119_hda_eld() local
34 nvkm_wr32(device, 0x10ec00 + soff, (i << 8) | data[i]); in gf119_hda_eld()
36 nvkm_wr32(device, 0x10ec00 + soff, (i << 8)); in gf119_hda_eld()
37 nvkm_mask(device, 0x10ec10 + soff, 0x80000002, 0x80000002); in gf119_hda_eld()
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| D | sorgf119.c | 94 const u32 soff = nv50_ior_base(sor); in gf119_sor_dp_pattern() local
95 nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, 0x01010101 * pattern); in gf119_sor_dp_pattern()
102 const u32 soff = nv50_ior_base(sor); in gf119_sor_dp_links() local
114 nvkm_mask(device, 0x612300 + soff, 0x007c0000, clksor); in gf119_sor_dp_links()
124 const u32 soff = nv50_ior_base(sor); in gf119_sor_clock() local
127 nvkm_mask(device, 0x612300 + soff, 0x007c0000, 0x0a << 18); in gf119_sor_clock()
129 nvkm_mask(device, 0x612300 + soff, 0x00000707, (div << 8) | div); in gf119_sor_clock()
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| D | sorgm107.c | 30 const u32 soff = nv50_ior_base(sor); in gm107_sor_dp_pattern() local
33 nvkm_mask(device, 0x61c110 + soff, 0x0f0f0f0f, data); in gm107_sor_dp_pattern()
35 nvkm_mask(device, 0x61c12c + soff, 0x0f0f0f0f, data); in gm107_sor_dp_pattern()
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| D | sorgt215.c | 30 const u32 soff = nv50_ior_base(sor); in gt215_sor_dp_audio() local
33 nvkm_mask(device, 0x61c1e0 + soff, mask, data); in gt215_sor_dp_audio()
35 if (!(nvkm_rd32(device, 0x61c1e0 + soff) & 0x80000000)) in gt215_sor_dp_audio()
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| /drivers/dma/ |
| D | fsl-edma.c | 126 __le16 soff; member
456 edma_writew(edma, le16_to_cpu(tcd->soff), addr + EDMA_TCD_SOFF(ch)); in fsl_edma_set_tcd_regs()
472 u16 attr, u16 soff, u32 nbytes, u32 slast, u16 citer, in fsl_edma_fill_tcd() argument
489 tcd->soff = cpu_to_le16(EDMA_TCD_SOFF_SOFF(soff)); in fsl_edma_fill_tcd()
551 u16 soff, doff, iter; in fsl_edma_prep_dma_cyclic() local
576 soff = fsl_chan->fsc.addr_width; in fsl_edma_prep_dma_cyclic()
581 soff = 0; in fsl_edma_prep_dma_cyclic()
586 fsl_chan->fsc.attr, soff, nbytes, 0, iter, in fsl_edma_prep_dma_cyclic()
603 u16 soff, doff, iter; in fsl_edma_prep_slave_sg() local
622 soff = fsl_chan->fsc.addr_width; in fsl_edma_prep_slave_sg()
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| D | mpc512x_dma.c | 152 u32 soff:16; /* Signed source address offset */ member
647 tcd->soff = 32; in mpc_dma_prep_memcpy()
653 tcd->soff = 16; in mpc_dma_prep_memcpy()
658 tcd->soff = 4; in mpc_dma_prep_memcpy()
663 tcd->soff = 2; in mpc_dma_prep_memcpy()
668 tcd->soff = 1; in mpc_dma_prep_memcpy()
760 tcd->soff = 0; in mpc_dma_prep_slave_sg()
769 tcd->soff = mchan->swidth; in mpc_dma_prep_slave_sg()
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| /drivers/video/console/ |
| D | vgacon.c | 282 int start, end, count, soff; in vgacon_scrolldelta() local
317 soff = vgacon_scrollback_cur->tail - in vgacon_scrolldelta()
319 soff -= count * c->vc_size_row; in vgacon_scrolldelta()
321 if (soff < 0) in vgacon_scrolldelta()
322 soff += vgacon_scrollback_cur->size; in vgacon_scrolldelta()
338 copysize = min(count, vgacon_scrollback_cur->size - soff); in vgacon_scrolldelta()
339 scr_memcpyw(d, vgacon_scrollback_cur->data + soff, copysize); in vgacon_scrolldelta()
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| /drivers/gpu/drm/nouveau/dispnv04/ |
| D | overlay.c | 129 int soff = NV_PCRTC0_SIZE * nv_crtc->index; in nv10_update_plane() local
151 nvif_mask(dev, NV_PCRTC_ENGINE_CTRL + soff, NV_CRTC_FSEL_OVERLAY, NV_CRTC_FSEL_OVERLAY); in nv10_update_plane()
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| /drivers/block/aoe/ |
| D | aoecmd.c | 1049 int soff = 0; in bvcpy() local
1056 skb_copy_bits(skb, soff, p, bv.bv_len); in bvcpy()
1057 soff += bv.bv_len; in bvcpy()
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| /drivers/crypto/ |
| D | hifn_795x.c | 1333 unsigned int soff, doff; in hifn_setup_dma() local
1339 soff = src->offset; in hifn_setup_dma()
1342 hifn_setup_src_desc(dev, spage, soff, len, n - len == 0); in hifn_setup_dma()
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| /drivers/net/ethernet/brocade/bna/ |
| D | bfa_ioc.c | 2202 bfa_nw_ioc_smem_read(struct bfa_ioc *ioc, void *tbuf, u32 soff, u32 sz) in bfa_nw_ioc_smem_read() argument
2208 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff); in bfa_nw_ioc_smem_read()
2209 loff = PSS_SMEM_PGOFF(soff); in bfa_nw_ioc_smem_read()
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| /drivers/scsi/bfa/ |
| D | bfa_ioc.c | 2055 bfa_ioc_smem_read(struct bfa_ioc_s *ioc, void *tbuf, u32 soff, u32 sz) in bfa_ioc_smem_read() argument
2062 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff); in bfa_ioc_smem_read()
2063 loff = PSS_SMEM_PGOFF(soff); in bfa_ioc_smem_read()
2114 bfa_ioc_smem_clr(struct bfa_ioc_s *ioc, u32 soff, u32 sz) in bfa_ioc_smem_clr() argument
2119 pgnum = PSS_SMEM_PGNUM(ioc->ioc_regs.smem_pg0, soff); in bfa_ioc_smem_clr()
2120 loff = PSS_SMEM_PGOFF(soff); in bfa_ioc_smem_clr()
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| /drivers/net/ethernet/sun/ |
| D | cassini.h | 2137 u8 soff, snext; /* if match succeeds, new offset and match */ member
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| D | cassini.c | 1189 val |= CAS_BASE(HP_INSTR_RAM_MID_SOFF, inst->soff); in cas_load_firmware()
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