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Searched refs:soft_regs_start (Results 1 – 25 of 28) sorted by relevance

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/drivers/gpu/drm/amd/powerplay/smumgr/
Dsmu7_smumgr.c404 if (smu_data->soft_regs_start) in smu7_request_smu_load_fw()
406 smu_data->soft_regs_start + smum_get_offsetof(smumgr, in smu7_request_smu_load_fw()
491 smu_data->soft_regs_start + smum_get_offsetof(smumgr, in smu7_check_fw_load_finish()
Dsmu7_smumgr.h51 uint32_t soft_regs_start; member
Dfiji_smumgr.c337 &(priv->smu7_data.soft_regs_start), 0x40000); in fiji_start_smu()
Dpolaris10_smumgr.c346 &(smu_data->smu7_data.soft_regs_start), 0x40000); in polaris10_start_smu()
Dpolaris10_smc.c1471 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, smu_data->smu7_data.soft_regs_start + in polaris10_populate_vr_config()
2287 data->soft_regs_start = tmp; in polaris10_process_firmware_header()
2288 smu_data->smu7_data.soft_regs_start = tmp; in polaris10_process_firmware_header()
Diceland_smc.c2208 data->soft_regs_start = tmp; in iceland_process_firmware_header()
2209 smu7_data->soft_regs_start = tmp; in iceland_process_firmware_header()
Dfiji_smc.c2397 data->soft_regs_start = tmp; in fiji_process_firmware_header()
2398 smu_data->smu7_data.soft_regs_start = tmp; in fiji_process_firmware_header()
Dtonga_smc.c2869 data->soft_regs_start = tmp; in tonga_process_firmware_header()
2870 smu_data->smu7_data.soft_regs_start = tmp; in tonga_process_firmware_header()
/drivers/gpu/drm/radeon/
Dsi_dpm.h178 u32 soft_regs_start; member
Dkv_dpm.h123 u32 soft_regs_start; member
Dci_dpm.h218 u32 soft_regs_start; member
Drv770_dpm.h135 u16 soft_regs_start; member
Drv770_dpm.c241 pi->soft_regs_start + reg_offset,
252 pi->soft_regs_start + reg_offset, in rv770_write_smc_soft_register()
2427 pi->soft_regs_start = RV770_SMC_SOFT_REGISTERS_START; in rv770_dpm_init()
Dkv_dpm.c472 pi->soft_regs_start = tmp; in kv_process_firmware_header()
1338 return kv_copy_bytes_to_smc(rdev, pi->soft_regs_start + reg_offset,
1347 return kv_read_smc_sram_dword(rdev, pi->soft_regs_start + reg_offset,
Dci_dpm.c1284 pi->soft_regs_start + reg_offset,
1295 pi->soft_regs_start + reg_offset, in ci_write_smc_soft_register()
1814 pi->soft_regs_start = tmp; in ci_process_firmware_header()
Dsi_dpm.c3188 si_pi->soft_regs_start + reg_offset, value,
3199 si_pi->soft_regs_start + reg_offset, in si_write_smc_soft_register()
3498 si_pi->soft_regs_start = tmp; in si_process_firmware_header()
Dcypress_dpm.c1714 pi->soft_regs_start = (u16)tmp; in cypress_get_table_locations()
/drivers/gpu/drm/amd/powerplay/hwmgr/
Drv_hwmgr.h245 uint32_t soft_regs_start; member
Dsmu7_hwmgr.h231 uint32_t soft_regs_start; member
Dcz_hwmgr.h265 uint32_t soft_regs_start; member
Dsmu7_hwmgr.c930 uint32_t handshake_disables_offset = data->soft_regs_start in smu7_disable_handshake_uvd()
995 data->soft_regs_start + in smu7_start_dpm()
3371 offset = data->soft_regs_start + smum_get_offsetof(hwmgr->smumgr, in smu7_read_sensor()
3985 data->soft_regs_start + smum_get_offsetof(hwmgr->smumgr, in smu7_program_display_gap()
3990 data->soft_regs_start + smum_get_offsetof(hwmgr->smumgr, in smu7_program_display_gap()
/drivers/gpu/drm/amd/amdgpu/
Dkv_dpm.h149 u32 soft_regs_start; member
Dci_dpm.h220 u32 soft_regs_start; member
Dsi_dpm.h592 u16 soft_regs_start; member
985 u32 soft_regs_start; member
Dkv_dpm.c602 pi->soft_regs_start = tmp; in kv_process_firmware_header()
1405 return amdgpu_kv_copy_bytes_to_smc(adev, pi->soft_regs_start + reg_offset,
1414 return amdgpu_kv_read_smc_sram_dword(adev, pi->soft_regs_start + reg_offset,

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