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/drivers/s390/char/
Draw3270.c45 struct raw3270_view *view; /* Active view. */ member
238 __raw3270_start(struct raw3270 *rp, struct raw3270_view *view, in __raw3270_start() argument
241 rq->view = view; in __raw3270_start()
242 raw3270_get_view(view); in __raw3270_start()
249 raw3270_put_view(view); in __raw3270_start()
258 raw3270_view_active(struct raw3270_view *view) in raw3270_view_active() argument
260 struct raw3270 *rp = view->dev; in raw3270_view_active()
262 return rp && rp->view == view && in raw3270_view_active()
267 raw3270_start(struct raw3270_view *view, struct raw3270_request *rq) in raw3270_start() argument
273 spin_lock_irqsave(get_ccwdev_lock(view->dev->cdev), flags); in raw3270_start()
[all …]
Dcon3270.c42 struct raw3270_view view; member
97 codepage_convert(cp->view.ascebc, cp->status->string + 24, 7); in con3270_update_status()
113 raw3270_buffer_address(cp->view.dev, cp->status->string + 1, in con3270_create_status()
114 cp->view.cols * (cp->view.rows - 1)); in con3270_create_status()
115 raw3270_buffer_address(cp->view.dev, cp->status->string + 21, in con3270_create_status()
116 cp->view.cols * cp->view.rows - 8); in con3270_create_status()
118 codepage_convert(cp->view.ascebc, cp->status->string + 8, 12); in con3270_create_status()
119 codepage_convert(cp->view.ascebc, cp->status->string + 24, 7); in con3270_create_status()
135 raw3270_buffer_address(cp->view.dev, s->string + s->len - 3, in con3270_update_string()
136 cp->view.cols * (nr + 1)); in con3270_update_string()
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Dtty3270.c63 struct raw3270_view view; member
146 if (count > tp->view.cols * 2 - 11) in tty3270_update_prompt()
147 count = tp->view.cols * 2 - 11; in tty3270_update_prompt()
151 if (count < tp->view.cols * 2 - 11) { in tty3270_update_prompt()
154 off = tp->view.cols * tp->view.rows - 9; in tty3270_update_prompt()
155 raw3270_buffer_address(tp->view.dev, line->string+count+8, off); in tty3270_update_prompt()
173 sizeof(blueprint) + tp->view.cols * 2 - 9); in tty3270_create_prompt()
180 offset = tp->view.cols * (tp->view.rows - 2); in tty3270_create_prompt()
181 raw3270_buffer_address(tp->view.dev, line->string + 1, offset); in tty3270_create_prompt()
182 offset = tp->view.cols * tp->view.rows - 9; in tty3270_create_prompt()
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Dfs3270.c33 struct raw3270_view view; member
64 fs3270_do_io(struct raw3270_view *view, struct raw3270_request *rq) in fs3270_do_io() argument
69 fp = (struct fs3270 *) view; in fs3270_do_io()
81 rc = raw3270_start(view, rq); in fs3270_do_io()
98 fp = (struct fs3270 *) rq->view; in fs3270_reset_callback()
108 fp = (struct fs3270 *) rq->view; in fs3270_restore_callback()
119 fs3270_activate(struct raw3270_view *view) in fs3270_activate() argument
125 fp = (struct fs3270 *) view; in fs3270_activate()
152 rc = fp->init->rc = raw3270_start_locked(view, fp->init); in fs3270_activate()
168 fp = (struct fs3270 *) rq->view; in fs3270_save_callback()
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Draw3270.h100 struct raw3270_view *view; /* view of this request */ member
177 raw3270_get_view(struct raw3270_view *view) in raw3270_get_view() argument
179 atomic_inc(&view->ref_count); in raw3270_get_view()
185 raw3270_put_view(struct raw3270_view *view) in raw3270_put_view() argument
187 if (atomic_dec_return(&view->ref_count) == 0) in raw3270_put_view()
/drivers/gpu/drm/vmwgfx/
Dvmwgfx_so.c128 struct vmw_view *view = vmw_view(res); in vmw_view_commit_notify() local
133 struct vmw_surface *srf = vmw_res_to_srf(view->srf); in vmw_view_commit_notify()
135 list_add_tail(&view->srf_head, &srf->view_list); in vmw_view_commit_notify()
136 vmw_cotable_add_resource(view->cotable, &view->cotable_head); in vmw_view_commit_notify()
137 view->committed = true; in vmw_view_commit_notify()
138 res->id = view->view_id; in vmw_view_commit_notify()
141 list_del_init(&view->cotable_head); in vmw_view_commit_notify()
142 list_del_init(&view->srf_head); in vmw_view_commit_notify()
143 view->committed = false; in vmw_view_commit_notify()
159 struct vmw_view *view = vmw_view(res); in vmw_view_create() local
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Dvmwgfx_execbuf.c320 struct vmw_resource *view) in vmw_view_res_val_add() argument
328 ret = vmw_resource_val_add(sw_context, vmw_view_srf(view), NULL); in vmw_view_res_val_add()
332 return vmw_resource_val_add(sw_context, view, NULL); in vmw_view_res_val_add()
351 struct vmw_resource *view; in vmw_view_id_val_add() local
359 view = vmw_view_lookup(sw_context->man, view_type, id); in vmw_view_id_val_add()
360 if (IS_ERR(view)) in vmw_view_id_val_add()
361 return PTR_ERR(view); in vmw_view_id_val_add()
363 ret = vmw_view_res_val_add(sw_context, view); in vmw_view_id_val_add()
364 vmw_resource_unreference(&view); in vmw_view_id_val_add()
919 struct vmw_resource *view = NULL; in vmw_view_bindings_add() local
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/drivers/usb/phy/
Dphy-ulpi-viewport.c30 static int ulpi_viewport_wait(void __iomem *view, u32 mask) in ulpi_viewport_wait() argument
35 if (!(readl(view) & mask)) in ulpi_viewport_wait()
47 void __iomem *view = otg->io_priv; in ulpi_viewport_read() local
49 writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view); in ulpi_viewport_read()
50 ret = ulpi_viewport_wait(view, ULPI_VIEW_WAKEUP); in ulpi_viewport_read()
54 writel(ULPI_VIEW_RUN | ULPI_VIEW_READ | ULPI_VIEW_ADDR(reg), view); in ulpi_viewport_read()
55 ret = ulpi_viewport_wait(view, ULPI_VIEW_RUN); in ulpi_viewport_read()
59 return ULPI_VIEW_DATA_READ(readl(view)); in ulpi_viewport_read()
65 void __iomem *view = otg->io_priv; in ulpi_viewport_write() local
67 writel(ULPI_VIEW_WAKEUP | ULPI_VIEW_WRITE, view); in ulpi_viewport_write()
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/drivers/gpu/drm/i915/selftests/
Di915_vma.c61 struct i915_ggtt_view *view) in checked_vma_instance() argument
66 vma = i915_vma_instance(obj, vm, view); in checked_vma_instance()
83 if (i915_vma_compare(vma, vm, view)) { in checked_vma_instance()
441 struct i915_ggtt_view view; in igt_vma_rotate() local
449 view.type = I915_GGTT_VIEW_ROTATED; in igt_vma_rotate()
450 view.rotated.plane[0] = *a; in igt_vma_rotate()
451 view.rotated.plane[1] = *b; in igt_vma_rotate()
453 for_each_prime_number_from(view.rotated.plane[0].offset, 0, max_offset) { in igt_vma_rotate()
454 for_each_prime_number_from(view.rotated.plane[1].offset, 0, max_offset) { in igt_vma_rotate()
458 vma = checked_vma_instance(obj, vm, &view); in igt_vma_rotate()
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Di915_gem_object.c222 struct i915_ggtt_view view = in check_partial_mapping() local
230 GEM_BUG_ON(view.partial.size > nreal); in check_partial_mapping()
236 vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE); in check_partial_mapping()
243 n = page - view.partial.offset; in check_partial_mapping()
244 GEM_BUG_ON(n >= view.partial.size); in check_partial_mapping()
277 view.partial.offset, in check_partial_mapping()
278 view.partial.size, in check_partial_mapping()
/drivers/gpu/drm/i915/
Di915_vma.c75 const struct i915_ggtt_view *view) in vma_create() argument
97 if (view && view->type != I915_GGTT_VIEW_NORMAL) { in vma_create()
98 vma->ggtt_view = *view; in vma_create()
99 if (view->type == I915_GGTT_VIEW_PARTIAL) { in vma_create()
101 view->partial.offset, in vma_create()
102 view->partial.size, in vma_create()
104 vma->size = view->partial.size; in vma_create()
107 } else if (view->type == I915_GGTT_VIEW_ROTATED) { in vma_create()
108 vma->size = intel_rotation_info_size(&view->rotated); in vma_create()
150 if (i915_vma_compare(pos, vm, view) < 0) in vma_create()
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Di915_vma.h129 const struct i915_ggtt_view *view);
204 const struct i915_ggtt_view *view) in i915_vma_compare() argument
208 GEM_BUG_ON(view && !i915_is_ggtt(vm)); in i915_vma_compare()
216 if (!view) in i915_vma_compare()
219 cmp -= view->type; in i915_vma_compare()
235 BUILD_BUG_ON(offsetof(typeof(*view), rotated) != in i915_vma_compare()
236 offsetof(typeof(*view), partial)); in i915_vma_compare()
237 return memcmp(&vma->ggtt_view.partial, &view->partial, view->type); in i915_vma_compare()
Di915_gem.c1787 struct i915_ggtt_view view; in compute_partial_view() local
1792 view.type = I915_GGTT_VIEW_PARTIAL; in compute_partial_view()
1793 view.partial.offset = rounddown(page_offset, chunk); in compute_partial_view()
1794 view.partial.size = in compute_partial_view()
1796 (obj->base.size >> PAGE_SHIFT) - view.partial.offset); in compute_partial_view()
1800 view.type = I915_GGTT_VIEW_NORMAL; in compute_partial_view()
1802 return view; in compute_partial_view()
1886 struct i915_ggtt_view view = in i915_gem_fault() local
1894 vma = i915_gem_object_ggtt_pin(obj, &view, 0, 0, PIN_MAPPABLE); in i915_gem_fault()
3810 const struct i915_ggtt_view *view) in i915_gem_object_pin_to_display_plane() argument
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Di915_drv.h3401 const struct i915_ggtt_view *view,
3409 const struct i915_ggtt_view *view,
3640 const struct i915_ggtt_view *view);
Di915_gem_gtt.c3295 intel_partial_pages(const struct i915_ggtt_view *view, in intel_partial_pages() argument
3300 unsigned int count = view->partial.size; in intel_partial_pages()
3312 iter = i915_gem_object_get_sg(obj, view->partial.offset, &offset); in intel_partial_pages()
/drivers/gpu/drm/nouveau/
Dnv50_display.c117 } view; member
205 bool view:1; member
1876 evo_data(push, (asyh->view.iH << 16) | asyh->view.iW); in nv50_head_view()
1878 evo_data(push, (asyh->view.oH << 16) | asyh->view.oW); in nv50_head_view()
1879 evo_data(push, (asyh->view.oH << 16) | asyh->view.oW); in nv50_head_view()
1884 evo_data(push, (asyh->view.iH << 16) | asyh->view.iW); in nv50_head_view()
1886 evo_data(push, (asyh->view.oH << 16) | asyh->view.oW); in nv50_head_view()
1887 evo_data(push, (asyh->view.oH << 16) | asyh->view.oW); in nv50_head_view()
1888 evo_data(push, (asyh->view.oH << 16) | asyh->view.oW); in nv50_head_view()
1908 if (asyh->set.view ) nv50_head_view (head, asyh); in nv50_head_flush_set()
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/drivers/bcma/
DREADME2 however from programming point of view there is nothing AMBA specific we use.
/drivers/hwtracing/coresight/
DKconfig11 a topological view of the CoreSight components based on a DT
/drivers/isdn/hardware/eicon/
Ddebug.c1438 int view = (TraceFilter[0] == 0); in diva_maint_state_change_notify() local
1451 view = 1; in diva_maint_state_change_notify()
1469 view = 1; in diva_maint_state_change_notify()
1472 if (view && (pC->hDbg->dbgMask & DIVA_MGT_DBG_LINE_EVENTS)) { in diva_maint_state_change_notify()
/drivers/mtd/devices/
DKconfig17 will use a 1G memory map as its view of the device. As a module,
/drivers/s390/net/
Dqeth_core.h53 struct debug_view *view; member
/drivers/staging/fsl-mc/
DREADME.txt107 From the point of view of an OS, a DPRC behaves similar to a plug and
/drivers/staging/rtl8192u/
Dcopying109 these conditions, and telling the user how to view a copy of this
/drivers/staging/rtl8192e/
Dlicense112 telling the user how to view a copy of this License. (Exception: if
/drivers/char/
DKconfig277 on Ataris. /dev/nvram may be used to view settings there, or to

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