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Searched refs:IO_STATE (Results 1 – 15 of 15) sorted by relevance

/arch/cris/arch-v10/kernel/
Dtime.c117 IO_STATE(R_WATCHDOG, enable, start); in reset_watchdog()
129 IO_STATE(R_WATCHDOG, enable, stop); in stop_watchdog()
149 IO_STATE( R_TIMER_CTRL, i1, clr) | in timer_interrupt()
150 IO_STATE( R_TIMER_CTRL, tm1, run) | in timer_interrupt()
151 IO_STATE( R_TIMER_CTRL, clksel1, cascade0) | in timer_interrupt()
152 IO_STATE( R_TIMER_CTRL, i0, clr) | in timer_interrupt()
153 IO_STATE( R_TIMER_CTRL, tm0, run) | in timer_interrupt()
154 IO_STATE( R_TIMER_CTRL, clksel0, c6250kHz); in timer_interrupt()
156 *R_TIMER_CTRL = r_timer_ctrl_shadow | IO_STATE(R_TIMER_CTRL, i0, clr); in timer_interrupt()
204 IO_STATE( R_TIMER_CTRL, i1, nop) | in time_init()
[all …]
Ddebugport.c51 IO_STATE(R_IRQ_MASK1_SET, ser0_data, set),
65 IO_STATE(R_IRQ_MASK1_SET, ser1_data, set),
79 IO_STATE(R_IRQ_MASK1_SET, ser2_data, set),
93 IO_STATE(R_IRQ_MASK1_SET, ser3_data, set),
147 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma6, unused); in start_port()
152 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma8, usb); in start_port()
157 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma2, par0); in start_port()
159 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma3, par0); in start_port()
160 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, ser2, select); in start_port()
165 genconfig_shadow |= IO_STATE(R_GEN_CONFIG, dma4, par1); in start_port()
[all …]
Dhead.S17 #define START_ETHERNET_CLOCK IO_STATE(R_NETWORK_GEN_CONFIG, enable, on) |\
18 IO_STATE(R_NETWORK_GEN_CONFIG, phy, mii_clk)
363 or.d IO_STATE (R_GEN_CONFIG, ser2, select),$r0
365 or.d IO_STATE (R_GEN_CONFIG, ser2, disable),$r0
369 or.d IO_STATE (R_GEN_CONFIG, scsi0, disable) \
370 | IO_STATE (R_GEN_CONFIG, ata, disable) \
371 | IO_STATE (R_GEN_CONFIG, par0, disable) \
372 | IO_STATE (R_GEN_CONFIG, mio, disable) \
373 | IO_STATE (R_GEN_CONFIG, scsi1, disable) \
374 | IO_STATE (R_GEN_CONFIG, scsi0w, disable) \
[all …]
Ddma.c231 *R_DMA_CH0_CMD = IO_STATE(R_DMA_CH0_CMD, cmd, reset); in cris_free_dma()
236 *R_DMA_CH1_CMD = IO_STATE(R_DMA_CH1_CMD, cmd, reset); in cris_free_dma()
241 *R_DMA_CH2_CMD = IO_STATE(R_DMA_CH2_CMD, cmd, reset); in cris_free_dma()
246 *R_DMA_CH3_CMD = IO_STATE(R_DMA_CH3_CMD, cmd, reset); in cris_free_dma()
251 *R_DMA_CH4_CMD = IO_STATE(R_DMA_CH4_CMD, cmd, reset); in cris_free_dma()
256 *R_DMA_CH5_CMD = IO_STATE(R_DMA_CH5_CMD, cmd, reset); in cris_free_dma()
261 *R_DMA_CH6_CMD = IO_STATE(R_DMA_CH6_CMD, cmd, reset); in cris_free_dma()
266 *R_DMA_CH7_CMD = IO_STATE(R_DMA_CH7_CMD, cmd, reset); in cris_free_dma()
271 *R_DMA_CH8_CMD = IO_STATE(R_DMA_CH8_CMD, cmd, reset); in cris_free_dma()
276 *R_DMA_CH9_CMD = IO_STATE(R_DMA_CH9_CMD, cmd, reset); in cris_free_dma()
Dfasttimer.c181 *R_IRQ_MASK0_CLR = IO_STATE(R_IRQ_MASK0_CLR, timer1, clr); in start_timer1()
190 IO_STATE(R_TIMER_CTRL, tm1, stop_ld) | in start_timer1()
195 IO_STATE(R_TIMER_CTRL, i1, clr); in start_timer1()
200 IO_STATE(R_TIMER_CTRL, tm1, run); in start_timer1()
203 *R_IRQ_MASK0_SET = IO_STATE(R_IRQ_MASK0_SET, timer1, set); in start_timer1()
349 *R_IRQ_MASK0_CLR = IO_STATE(R_IRQ_MASK0_CLR, timer1, clr); in timer1_handler()
355 IO_STATE(R_TIMER_CTRL, tm1, stop_ld); in timer1_handler()
358 *R_TIMER_CTRL = r_timer_ctrl_shadow | IO_STATE(R_TIMER_CTRL, i1, clr); in timer1_handler()
Dirq.c153 (IO_STATE(R_VECT_MASK_RD, dma0, active) | in do_multiple_IRQ()
154 IO_STATE(R_VECT_MASK_RD, dma1, active))) { in do_multiple_IRQ()
Dtraps.c110 while (*R_IRQ_MASK0_RD & IO_STATE(R_IRQ_MASK0_RD, nmi_pin, active)) in handle_nmi()
Dprocess.c63 IO_STATE(R_WATCHDOG, enable, start); in hard_reset_now()
/arch/cris/arch-v10/mm/
Dinit.c69 *R_MMU_KSEG = ( IO_STATE(R_MMU_KSEG, seg_f, seg ) | /* bootrom */ in paging_init()
70 IO_STATE(R_MMU_KSEG, seg_e, page ) | in paging_init()
71 IO_STATE(R_MMU_KSEG, seg_d, page ) | in paging_init()
72 IO_STATE(R_MMU_KSEG, seg_c, page ) | in paging_init()
73 IO_STATE(R_MMU_KSEG, seg_b, seg ) | /* kernel reg area */ in paging_init()
74 IO_STATE(R_MMU_KSEG, seg_a, page ) | in paging_init()
75 IO_STATE(R_MMU_KSEG, seg_9, seg ) | /* LED's on some boards */ in paging_init()
76 IO_STATE(R_MMU_KSEG, seg_8, seg ) | /* CSE0/1, flash and I/O */ in paging_init()
77 IO_STATE(R_MMU_KSEG, seg_7, page ) | /* kernel vmalloc area */ in paging_init()
78 IO_STATE(R_MMU_KSEG, seg_6, seg ) | /* kernel DRAM area */ in paging_init()
[all …]
Dtlb.c51 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) | in flush_tlb_all()
52 IO_STATE(R_TLB_LO, valid, no ) | in flush_tlb_all()
53 IO_STATE(R_TLB_LO, kernel,no ) | in flush_tlb_all()
54 IO_STATE(R_TLB_LO, we, no ) | in flush_tlb_all()
87 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) | in flush_tlb_mm()
88 IO_STATE(R_TLB_LO, valid, no ) | in flush_tlb_mm()
89 IO_STATE(R_TLB_LO, kernel,no ) | in flush_tlb_mm()
90 IO_STATE(R_TLB_LO, we, no ) | in flush_tlb_mm()
127 *R_TLB_LO = ( IO_STATE(R_TLB_LO, global,no ) | in flush_tlb_page()
128 IO_STATE(R_TLB_LO, valid, no ) | in flush_tlb_page()
[all …]
/arch/cris/arch-v10/drivers/
Dsync_serial.c327 IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u1, codec) | in etrax_sync_serial_init()
328 IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u1, external) | in etrax_sync_serial_init()
329 IO_STATE(R_SYNC_SERIAL_PRESCALE, clk_sel_u3, codec) | in etrax_sync_serial_init()
330 IO_STATE(R_SYNC_SERIAL_PRESCALE, word_stb_sel_u3, external) | in etrax_sync_serial_init()
331 IO_STATE(R_SYNC_SERIAL_PRESCALE, prescaler, div4) | in etrax_sync_serial_init()
335 IO_STATE(R_SYNC_SERIAL_PRESCALE, warp_mode, normal)); in etrax_sync_serial_init()
370 IO_STATE(R_SYNC_SERIAL1_CTRL, tr_baud, c115k2Hz) | in initialize_port()
371 IO_STATE(R_SYNC_SERIAL1_CTRL, mode, master_output) | in initialize_port()
372 IO_STATE(R_SYNC_SERIAL1_CTRL, error, ignore) | in initialize_port()
373 IO_STATE(R_SYNC_SERIAL1_CTRL, rec_enable, disable) | in initialize_port()
[all …]
Di2c.c642 IO_STATE(R_PORT_PB_I2C, i2c_en, on) | in i2c_init()
645 IO_STATE(R_PORT_PB_I2C, i2c_oe_, enable); in i2c_init()
651 IO_STATE(R_PORT_PB_DIR, dir0, input) | in i2c_init()
652 IO_STATE(R_PORT_PB_DIR, dir1, output)); in i2c_init()
Dgpio.c770 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g0dir, out)) in ioif_watcher()
772 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g8_15dir, out)) in ioif_watcher()
774 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g16_23dir, out)) in ioif_watcher()
776 if (genconfig_shadow & IO_STATE(R_GEN_CONFIG, g24dir, out)) in ioif_watcher()
/arch/cris/include/uapi/arch-v10/arch/
Dsv_addr_ag.h34 #define IO_STATE(reg, field, state) IO_STATE_ (reg##_, field##_, _##state) macro
124 IO_STATE( R_BUS_CONFIG, CE, DISABLE )
125 IO_STATE( R_BUS_CONFIG, CE, ENABLE )
127 IO_STATE( R_DRAM_TIMING, REF, IVAL2 )
134 == IO_STATE( R_EXT_DMA_0_STAT, S, STARTED )
Dsvinto.h43 *R_DMA_CH##n##_CMD = IO_STATE( R_DMA_CH0_CMD, cmd, reset )
54 IO_STATE( R_DMA_CH0_CMD, cmd, hold ) )