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Searched refs:clk_set_rate (Results 1 – 25 of 42) sorted by relevance

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/arch/mips/ralink/
Dclk.c59 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
63 EXPORT_SYMBOL_GPL(clk_set_rate);
/arch/arm/mach-omap1/
Dserial.c149 clk_set_rate(uart1_ck, 12000000); in omap_serial_init()
159 clk_set_rate(uart2_ck, 12000000); in omap_serial_init()
161 clk_set_rate(uart2_ck, 48000000); in omap_serial_init()
171 clk_set_rate(uart3_ck, 12000000); in omap_serial_init()
Dclock.h169 int (*clk_set_rate)(struct clk *clk, unsigned long rate); member
/arch/arm/plat-versatile/
Dclock.c47 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
54 EXPORT_SYMBOL(clk_set_rate);
/arch/arm/mach-mmp/
Dclock.c92 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
105 EXPORT_SYMBOL(clk_set_rate);
/arch/arm/mach-omap2/
Domap2-restart.c39 clk_set_rate(reset_virt_prcm_set_ck, rate); in omap2xxx_restart()
/arch/mips/loongson64/lemote-2f/
Dclock.c92 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
124 EXPORT_SYMBOL_GPL(clk_set_rate);
/arch/arm/mach-s3c24xx/
Dcpufreq-utils.c65 clk_set_rate(cfg->mpll, cfg->pll.frequency); in s3c2410_set_fvco()
/arch/mips/lantiq/
Dclk.c82 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
100 EXPORT_SYMBOL(clk_set_rate);
/arch/powerpc/platforms/512x/
Dmpc512x_shared.c143 clk_set_rate(clk_diu, want); in mpc512x_set_pixel_clock()
152 clk_set_rate(clk_diu, want); in mpc512x_set_pixel_clock()
173 clk_set_rate(clk_diu, pixclock); in mpc512x_set_pixel_clock()
/arch/sh/boards/
Dboard-apsh4ad0a.c109 ret = clk_set_rate(clk, 33333000); in apsh4ad0a_clk_init()
Dboard-urquell.c196 ret = clk_set_rate(clk, 33333333); in urquell_clk_init()
Dboard-apsh4a3a.c131 ret = clk_set_rate(clk, 33333000); in apsh4a3a_clk_init()
/arch/arm/mach-mvebu/
Dplatsmp.c68 clk_set_rate(cpu_clk, rate); in set_secondary_cpu_clock()
/arch/avr32/mach-at32ap/
Dclock.c155 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
172 EXPORT_SYMBOL(clk_set_rate);
/arch/mips/bcm63xx/
Dclk.c355 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
359 EXPORT_SYMBOL_GPL(clk_set_rate);
/arch/unicore32/kernel/
Dclock.c136 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
215 EXPORT_SYMBOL(clk_set_rate);
/arch/sh/boards/mach-sdk7786/
Dsetup.c207 ret = clk_set_rate(clk, 33333333); in sdk7786_clk_init()
/arch/mips/alchemy/devboards/
Ddb1550.c587 clk_set_rate(c, 50000000); in db1550_dev_setup()
593 clk_set_rate(c, db1550_spi_platdata.mainclk_hz); in db1550_dev_setup()
/arch/c6x/platforms/
Dpll.c109 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
130 EXPORT_SYMBOL(clk_set_rate);
/arch/blackfin/mach-bf609/
Dclock.c124 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
131 EXPORT_SYMBOL(clk_set_rate);
/arch/arm/mach-davinci/
Dclock.c159 int clk_set_rate(struct clk *clk, unsigned long rate) in clk_set_rate() function
182 EXPORT_SYMBOL(clk_set_rate);
577 clk_set_rate(refclk, rate); in davinci_set_refclk_rate()
/arch/sh/boards/mach-se/7724/
Dsetup.c845 clk_set_rate(clk, clk_round_rate(clk, 83333333)); in devices_setup()
853 clk_set_rate(&sh7724_fsimcka_clk, 48000); in devices_setup()
855 clk_set_rate(clk, 48000); in devices_setup()
/arch/avr32/boards/hammerhead/
Dflash.c211 clk_set_rate(gclk, 6000000); in hammerhead_usbh_init()
/arch/mips/pci/
Dpci-lantiq.c119 clk_set_rate(clk_pci, *bus_clk); in ltq_pci_startup()

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