/arch/mips/kernel/ |
D | asm-offsets.c | 139 OFFSET(THREAD_FPR0, task_struct, thread.fpu.fpr[0]); in output_thread_fpu_defines() 140 OFFSET(THREAD_FPR1, task_struct, thread.fpu.fpr[1]); in output_thread_fpu_defines() 141 OFFSET(THREAD_FPR2, task_struct, thread.fpu.fpr[2]); in output_thread_fpu_defines() 142 OFFSET(THREAD_FPR3, task_struct, thread.fpu.fpr[3]); in output_thread_fpu_defines() 143 OFFSET(THREAD_FPR4, task_struct, thread.fpu.fpr[4]); in output_thread_fpu_defines() 144 OFFSET(THREAD_FPR5, task_struct, thread.fpu.fpr[5]); in output_thread_fpu_defines() 145 OFFSET(THREAD_FPR6, task_struct, thread.fpu.fpr[6]); in output_thread_fpu_defines() 146 OFFSET(THREAD_FPR7, task_struct, thread.fpu.fpr[7]); in output_thread_fpu_defines() 147 OFFSET(THREAD_FPR8, task_struct, thread.fpu.fpr[8]); in output_thread_fpu_defines() 148 OFFSET(THREAD_FPR9, task_struct, thread.fpu.fpr[9]); in output_thread_fpu_defines() [all …]
|
D | unaligned.c | 895 union fpureg *fpr; in emulate_load_store_insn() local 1249 fpr = ¤t->thread.fpu.fpr[wd]; in emulate_load_store_insn() 1253 if (!access_ok(VERIFY_READ, addr, sizeof(*fpr))) in emulate_load_store_insn() 1268 res = __copy_from_user_inatomic(fpr, addr, in emulate_load_store_insn() 1269 sizeof(*fpr)); in emulate_load_store_insn() 1281 write_msa_wr(wd, fpr, df); in emulate_load_store_insn() 1289 if (!access_ok(VERIFY_WRITE, addr, sizeof(*fpr))) in emulate_load_store_insn() 1299 read_msa_wr(wd, fpr, df); in emulate_load_store_insn() 1302 res = __copy_to_user_inatomic(addr, fpr, sizeof(*fpr)); in emulate_load_store_insn()
|
D | ptrace.c | 58 memset(&target->thread.fpu.fpr, ~0, sizeof(target->thread.fpu.fpr)); in init_fp_ctx() 471 fpr_val = get_fpr64(&target->thread.fpu.fpr[i], 0); in fpr_get_msa() 496 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t)) in fpr_get() 551 set_fpr64(&target->thread.fpu.fpr[i], 0, fpr_val); in fpr_set_msa() 586 if (sizeof(target->thread.fpu.fpr[0]) == sizeof(elf_fpreg_t)) in fpr_set()
|
D | kgdb.c | 154 memcpy((void *)¤t->thread.fpu.fpr[fp_reg], mem, in dbg_set_reg() 190 memcpy(mem, (void *)¤t->thread.fpu.fpr[fp_reg], in dbg_get_reg()
|
D | signal.c | 80 __put_user(get_fpr64(¤t->thread.fpu.fpr[i], 0), in copy_fp_to_sigcontext() 100 set_fpr64(¤t->thread.fpu.fpr[i], 0, fpr_val); in copy_fp_from_sigcontext() 180 val = get_fpr64(¤t->thread.fpu.fpr[i], 1); in save_msa_extcontext() 230 set_fpr64(¤t->thread.fpu.fpr[i], 1, val); in restore_msa_extcontext()
|
D | branch.c | 688 bit = get_fpr32(¤t->thread.fpu.fpr[reg], 0) & 0x1; in __compute_return_epc_for_insn()
|
/arch/mips/include/asm/ |
D | processor.h | 112 static inline u##width get_fpr##width(union fpureg *fpr, unsigned idx) \ 114 return fpr->val##width[FPR_IDX(width, idx)]; \ 117 static inline void set_fpr##width(union fpureg *fpr, unsigned idx, \ 120 fpr->val##width[FPR_IDX(width, idx)] = val; \ 133 union fpureg fpr[NUM_FPU_REGS]; member 326 .fpr = {{{0,},},}, \
|
D | fpu.h | 253 return tsk->thread.fpu.fpr; in get_fpu_regs()
|
D | fpu_emulator.h | 199 set_fpr64(&t->thread.fpu.fpr[i], 0, SIGNALLING_NAN); in fpu_emulator_init_fpu()
|
/arch/powerpc/kernel/ |
D | ptrace32.c | 107 tmp = ((unsigned int *)child->thread.fp_state.fpr) in compat_arch_ptrace() 149 tmp = child->thread.fp_state.fpr[numReg - PT_FPR0][0]; in compat_arch_ptrace() 208 ((unsigned int *)child->thread.fp_state.fpr) in compat_arch_ptrace() 252 tmp = &child->thread.fp_state.fpr[numReg - PT_FPR0][0]; in compat_arch_ptrace()
|
D | signal_32.c | 300 buf[i] = task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; in copy_vsx_to_user() 313 task->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; in copy_vsx_from_user() 354 buf[i] = task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET]; in copy_transact_vsx_to_user() 367 task->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = buf[i]; in copy_transact_vsx_from_user() 375 return __copy_to_user(to, task->thread.fp_state.fpr, in copy_fpr_to_user() 382 return __copy_from_user(task->thread.fp_state.fpr, from, in copy_fpr_from_user() 390 return __copy_to_user(to, task->thread.transact_fp.fpr, in copy_transact_fpr_to_user() 397 return __copy_from_user(task->thread.transact_fp.fpr, from, in copy_transact_fpr_from_user() 738 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; in restore_user_regs() 855 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; in restore_tm_user_regs() [all …]
|
D | signal_64.c | 401 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; in restore_sigcontext() 540 current->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = 0; in restore_tm_sigcontexts() 541 current->thread.transact_fp.fpr[i][TS_VSRLOWOFFSET] = 0; in restore_tm_sigcontexts()
|
D | ptrace.c | 379 offsetof(struct thread_fp_state, fpr[32])); in fpr_get() 407 offsetof(struct thread_fp_state, fpr[32])); in fpr_set() 524 buf[i] = target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET]; in vsr_get() 543 target->thread.fp_state.fpr[i][TS_VSRLOWOFFSET] = buf[i]; in vsr_set()
|
D | asm-offsets.c | 444 DEFINE(VCPU_FPRS, offsetof(struct kvm_vcpu, arch.fp.fpr)); in main() 586 DEFINE(VCPU_FPRS_TM, offsetof(struct kvm_vcpu, arch.fp_tm.fpr)); in main()
|
D | align.c | 691 ptr = (char *) ¤t->thread.fp_state.fpr[reg][0]; in emulate_vsx()
|
/arch/mips/kvm/ |
D | mips.c | 573 v = get_fpr32(&fpu->fpr[idx], 0); in kvm_mips_get_reg() 575 v = get_fpr32(&fpu->fpr[idx & ~1], idx & 1); in kvm_mips_get_reg() 584 v = get_fpr64(&fpu->fpr[idx], 0); in kvm_mips_get_reg() 607 vs[0] = get_fpr64(&fpu->fpr[idx], 0); in kvm_mips_get_reg() 608 vs[1] = get_fpr64(&fpu->fpr[idx], 1); in kvm_mips_get_reg() 611 vs[0] = get_fpr64(&fpu->fpr[idx], 1); in kvm_mips_get_reg() 612 vs[1] = get_fpr64(&fpu->fpr[idx], 0); in kvm_mips_get_reg() 774 set_fpr32(&fpu->fpr[idx], 0, v); in kvm_mips_set_reg() 776 set_fpr32(&fpu->fpr[idx & ~1], idx & 1, v); in kvm_mips_set_reg() 785 set_fpr64(&fpu->fpr[idx], 0, v); in kvm_mips_set_reg() [all …]
|
/arch/mips/math-emu/ |
D | cp1emu.c | 444 union fpureg *fpr; in isBranchInstr() local 719 fpr = ¤t->thread.fpu.fpr[insn.i_format.rt]; in isBranchInstr() 720 bit0 = get_fpr32(fpr, 0) & 0x1; in isBranchInstr() 814 (si) = (int)get_fpr32(&ctx->fpr[x], 0); \ 816 (si) = (int)get_fpr32(&ctx->fpr[(x) & ~1], (x) & 1); \ 823 set_fpr32(&ctx->fpr[x], 0, si); \ 824 for (i = 1; i < ARRAY_SIZE(ctx->fpr[x].val32); i++) \ 825 set_fpr32(&ctx->fpr[x], i, 0); \ 827 set_fpr32(&ctx->fpr[(x) & ~1], (x) & 1, si); \ 831 #define SIFROMHREG(si, x) ((si) = (int)get_fpr32(&ctx->fpr[x], 1)) [all …]
|
/arch/powerpc/include/asm/ |
D | processor.h | 155 #define TS_FPR(i) fp_state.fpr[i][TS_FPROFFSET] 156 #define TS_TRANS_FPR(i) transact_fp.fpr[i][TS_FPROFFSET] 160 u64 fpr[32][TS_FPRWIDTH] __attribute__((aligned(16))); member
|
D | kvm_host.h | 696 #define VCPU_FPR(vcpu, i) (vcpu)->arch.fp.fpr[i][TS_FPROFFSET]
|
/arch/powerpc/kvm/ |
D | book3s.c | 563 val->vsxval[0] = vcpu->arch.fp.fpr[i][0]; in kvmppc_get_one_reg() 564 val->vsxval[1] = vcpu->arch.fp.fpr[i][1]; in kvmppc_get_one_reg() 639 vcpu->arch.fp.fpr[i][0] = val->vsxval[0]; in kvmppc_set_one_reg() 640 vcpu->arch.fp.fpr[i][1] = val->vsxval[1]; in kvmppc_set_one_reg()
|
D | book3s_paired_singles.c | 678 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) { in kvmppc_emulate_paired_single() 1258 for (i = 0; i < ARRAY_SIZE(vcpu->arch.fp.fpr); i++) { in kvmppc_emulate_paired_single()
|
D | book3s_hv.c | 1177 val->vsxval[j] = vcpu->arch.fp_tm.fpr[i][j]; in kvmppc_get_one_reg_hv() 1388 vcpu->arch.fp_tm.fpr[i][j] = val->vsxval[j]; in kvmppc_set_one_reg_hv()
|
/arch/x86/include/uapi/asm/ |
D | kvm.h | 158 __u8 fpr[8][16]; member
|
/arch/powerpc/include/uapi/asm/ |
D | kvm.h | 270 __u64 fpr[32]; member
|
/arch/m68k/fpsp040/ |
D | fpsp.h | 128 .set FPR_DIRTY_BITS,LV-91 | fpr dirty bits
|