| /arch/x86/crypto/ |
| D | serpent-avx-x86_64-asm_64.S | 68 #define S0_1(x0, x1, x2, x3, x4) \ argument
71 vpxor x2, x3, x4; \
76 vpxor x0, x2, x2;
77 #define S0_2(x0, x1, x2, x3, x4) \ argument
80 vpxor x2, x0, x0; \
81 vpand x1, x2, x2; \
82 vpxor x2, x3, x3; \
84 vpxor x4, x2, x2; \
85 vpxor x2, x1, x1;
87 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-avx2-asm_64.S | 60 #define S0_1(x0, x1, x2, x3, x4) \ argument
63 vpxor x2, x3, x4; \
68 vpxor x0, x2, x2;
69 #define S0_2(x0, x1, x2, x3, x4) \ argument
72 vpxor x2, x0, x0; \
73 vpand x1, x2, x2; \
74 vpxor x2, x3, x3; \
76 vpxor x4, x2, x2; \
77 vpxor x2, x1, x1;
79 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-sse2-x86_64-asm_64.S | 56 #define S0_1(x0, x1, x2, x3, x4) \ argument
60 pxor x2, x4; \
65 pxor x0, x2;
66 #define S0_2(x0, x1, x2, x3, x4) \ argument
69 pxor x2, x0; \
70 pand x1, x2; \
71 pxor x2, x3; \
73 pxor x4, x2; \
74 pxor x2, x1;
76 #define S1_1(x0, x1, x2, x3, x4) \ argument
[all …]
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| D | serpent-sse2-i586-asm_32.S | 57 #define K(x0, x1, x2, x3, x4, i) \ argument
63 pxor RT1, x2; \
67 #define LK(x0, x1, x2, x3, x4, i) \ argument
73 movdqa x2, x4; \
74 pslld $3, x2; \
76 por x4, x2; \
77 pxor x2, x1; \
84 pxor x2, x3; \
94 pxor x3, x2; \
95 pxor x4, x2; \
[all …]
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| D | glue_helper-asm-avx.S | 18 #define load_8way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
21 vmovdqu (2*16)(src), x2; \
28 #define store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
31 vmovdqu x2, (2*16)(dst); \
38 #define store_cbc_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
40 vpxor (1*16)(src), x2, x2; \
46 store_8way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
54 #define load_ctr_8way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t1, t2) \ argument
67 vpshufb t1, x7, x2; \
82 #define store_ctr_8way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
[all …]
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| D | glue_helper-asm-avx2.S | 13 #define load_16way(src, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
16 vmovdqu (2*32)(src), x2; \
23 #define store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
26 vmovdqu x2, (2*32)(dst); \
33 #define store_cbc_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7, t0) \ argument
38 vpxor (1*32+16)(src), x2, x2; \
44 store_16way(dst, x0, x1, x2, x3, x4, x5, x6, x7);
60 #define load_ctr_16way(iv, bswap, x0, x1, x2, x3, x4, x5, x6, x7, t0, t0x, t1, \ argument
78 vpshufb t1, t2, x2; \
93 #define store_ctr_16way(src, dst, x0, x1, x2, x3, x4, x5, x6, x7) \ argument
[all …]
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| /arch/arm64/kvm/ |
| D | vgic-v2-switch.S | 40 ldr x2, [x0, #VCPU_KVM]
41 kern_hyp_va x2
42 ldr x2, [x2, #KVM_VGIC_VCTRL]
43 kern_hyp_va x2
44 cbz x2, 2f // disabled
50 ldr w5, [x2, #GICH_VMCR]
51 ldr w6, [x2, #GICH_MISR]
52 ldr w7, [x2, #GICH_EISR0]
53 ldr w8, [x2, #GICH_EISR1]
54 ldr w9, [x2, #GICH_ELRSR0]
[all …]
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| D | hyp.S | 46 add x3, x2, #CPU_XREG_OFFSET(19)
65 str x22, [x2, #CPU_GP_REG_OFFSET(CPU_SP_EL1)]
66 str x23, [x2, #CPU_GP_REG_OFFSET(CPU_ELR_EL1)]
67 str x24, [x2, #CPU_SPSR_OFFSET(KVM_SPSR_EL1)]
74 ldr x22, [x2, #CPU_GP_REG_OFFSET(CPU_SP_EL1)]
75 ldr x23, [x2, #CPU_GP_REG_OFFSET(CPU_ELR_EL1)]
76 ldr x24, [x2, #CPU_SPSR_OFFSET(KVM_SPSR_EL1)]
82 add x3, x2, #CPU_XREG_OFFSET(31) // SP_EL0
90 add x3, x2, #CPU_XREG_OFFSET(19)
110 add x3, x2, #CPU_GP_REG_OFFSET(CPU_FP_REGS)
[all …]
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| /arch/powerpc/boot/dts/fsl/ |
| D | mpc8568mds.dts | 33 0x2 0x0 0xf0000000 0x04000000
101 reg = <0x2>;
132 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
133 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
134 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
135 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
136 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
137 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
138 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
139 0x4 0x14 0x1 0x0 0x2 0x0 /* TxD7 */
[all …]
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| D | mpc8569mds.dts | 38 0x2 0x0 0x0 0xf0000000 0x04000000
147 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
148 0x2 0x1e 0x3 0x0 0x2 0x0 /* QE_MUX_MDIO */
149 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
152 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
153 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
154 0x0 0x6 0x2 0x0 0x3 0x0 /* ENET1_RXD0_SER1_RXD0 */
155 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
156 0x0 0x8 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
157 0x0 0x9 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
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| D | p1025twr.dtsi | 98 reg = <0x2 0x0000 0x0004>;
112 reg = <0x2>;
180 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
181 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
182 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
183 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
184 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
185 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
186 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
187 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
[all …]
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| D | p1025rdb.dtsi | 253 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
254 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
255 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
256 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
257 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
258 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
259 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
260 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
261 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
262 0x0 0xf 0x2 0x0 0x2 0x0 /* ENET1_RXD3_SER1_RXD3 */
[all …]
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| D | p1021mds.dts | 32 0x2 0x0 0x0 0xf8010000 0x00020000
210 0x0 0x17 0x2 0x0 0x2 0x0 /* CLK12 */
211 0x0 0x18 0x2 0x0 0x1 0x0 /* CLK9 */
212 0x0 0x7 0x1 0x0 0x2 0x0 /* ENET1_TXD0_SER1_TXD0 */
213 0x0 0x9 0x1 0x0 0x2 0x0 /* ENET1_TXD1_SER1_TXD1 */
214 0x0 0xb 0x1 0x0 0x2 0x0 /* ENET1_TXD2_SER1_TXD2 */
215 0x0 0xc 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
216 0x0 0x6 0x2 0x0 0x2 0x0 /* ENET1_RXD0_SER1_RXD0 */
217 0x0 0xa 0x2 0x0 0x2 0x0 /* ENET1_RXD1_SER1_RXD1 */
218 0x0 0xe 0x2 0x0 0x2 0x0 /* ENET1_RXD2_SER1_RXD2 */
[all …]
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| D | p2020ds.dtsi | 83 reg = <0x2 0x0 0x40000>;
151 reg = <0x2>;
220 0x8800 0x0 0x0 0x1 &i8259 0x9 0x2
221 0x8800 0x0 0x0 0x2 &i8259 0xa 0x2
224 0x8900 0x0 0x0 0x1 &i8259 0x9 0x2
225 0x8900 0x0 0x0 0x2 &i8259 0xa 0x2
228 0x8a00 0x0 0x0 0x1 &i8259 0x9 0x2
229 0x8a00 0x0 0x0 0x2 &i8259 0xa 0x2
232 0x8b00 0x0 0x0 0x1 &i8259 0x9 0x2
233 0x8b00 0x0 0x0 0x2 &i8259 0xa 0x2
[all …]
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| D | mpc8572ds.dtsi | 94 reg = <0x2 0x0 0x40000>;
165 reg = <0x2>;
250 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
251 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
256 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
257 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
262 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
263 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
268 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
269 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
[all …]
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| D | mpc8548cds.dtsi | 119 reg = <0x2>;
173 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
174 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
179 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
184 0x3000 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
185 0x3000 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
191 0x4000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
192 0x4000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
197 0x6000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
198 0x6000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
[all …]
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| /arch/arm64/mm/ |
| D | cache.S | 52 uaccess_ttbr0_enable x2, x3, x4
53 dcache_line_size x2, x3
54 sub x3, x2, #1
58 add x4, x4, x2
63 icache_line_size x2, x3
64 sub x3, x2, #1
68 add x4, x4, x2
75 uaccess_ttbr0_disable x1, x2
93 dcache_by_line_op civac, sy, x0, x1, x2, x3
107 dcache_by_line_op cvau, ish, x0, x1, x2, x3
[all …]
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| /arch/sparc/include/asm/ |
| D | sfp-machine_32.h | 78 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
85 : "%rJ" ((USItype)(x2)), \
93 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ argument
100 : "%rJ" ((USItype)(x2)), \
108 #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
122 "%rJ" ((USItype)(x2)), \
133 #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ argument
147 "%rJ" ((USItype)(x2)), \
158 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
160 #define __FP_FRAC_DEC_4(x3,x2,x1,x0,y3,y2,y1,y0) __FP_FRAC_SUB_4(x3,x2,x1,x0,x3,x2,x1,x0,y3,y2,y1,y… argument
[all …]
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| /arch/arm64/kernel/ |
| D | entry32.S | 88 regs_to_64 x1, x2, x3
93 regs_to_64 x1, x2, x3
98 regs_to_64 x1, x2, x3
105 regs_to_64 x1, x2, x3
106 regs_to_64 x2, x4, x5
112 regs_to_64 x2, x2, x3
118 regs_to_64 x2, x2, x3
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| D | entry-ftrace.S | 101 ldr x2, [x0, #:lo12:ftrace_trace_function]
103 cmp x0, x2 // if (ftrace_trace_function
108 blr x2 // (*ftrace_trace_function)(pc, lr);
118 ldr x2, [x1, #:lo12:ftrace_graph_return]
119 cmp x0, x2 // if ((ftrace_graph_return
124 ldr x2, [x1, #:lo12:ftrace_graph_entry]
126 cmp x0, x2
184 stp x2, x3, [sp, #16]
192 ldp x2, x3, [sp, #16]
210 mcount_get_parent_fp x2 // parent's fp
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| D | efi-entry.S | 50 add x2, sp, 16
51 str x8, [x2]
72 adrp x2, _edata
73 add x2, x2, #:lo12:_edata
74 sub x1, x2, x1
114 mov x2, xzr
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| /arch/x86/math-emu/ |
| D | poly.h | 41 asmlinkage void div_Xsig(Xsig *x1, const Xsig *x2, const Xsig *dest);
73 static inline void add_Xsig_Xsig(Xsig *dest, const Xsig *x2) in add_Xsig_Xsig() argument
79 (*dest):"g"(dest), "g"(x2) in add_Xsig_Xsig()
87 static inline void add_two_Xsig(Xsig *dest, const Xsig *x2, long int *exp) in add_two_Xsig() argument
98 :"g"(dest), "g"(x2), "g"(exp) in add_two_Xsig()
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| /arch/arm64/lib/ |
| D | bitops.S | 32 mov x2, #1
35 lsl x3, x2, x3 // Create mask
50 mov x2, #1
53 lsl x4, x2, x3 // Create mask
56 lsr x0, x2, x3
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| /arch/s390/include/asm/ |
| D | sfp-machine.h | 75 #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \ argument
76 unsigned int __r2 = (x2) + (y2); \
101 #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) ({ \ argument
102 unsigned int __r2 = (x2) - (y2); \
127 #define __FP_FRAC_DEC_3(x2,x1,x0,y2,y1,y0) __FP_FRAC_SUB_3(x2,x1,x0,x2,x1,x0,y2,y1,y0) argument
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| /arch/powerpc/boot/dts/ |
| D | sbc8548-post.dtsi | 40 interrupts = <0x12 0x2>;
49 interrupts = <0x10 0x2>;
58 interrupts = <0x2b 0x2>;
69 interrupts = <0x2b 0x2>;
125 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
163 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
187 interrupts = <0x2a 0x2>;
197 interrupts = <0x2a 0x2>;
232 0x0800 0x0 0x0 0x1 &mpic 0x2 0x1
233 0x0800 0x0 0x0 0x2 &mpic 0x3 0x1
[all …]
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