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Searched refs:intel_crtc (Results 1 – 25 of 27) sorted by relevance

12

/drivers/gpu/drm/i915/
Dintel_display.c88 static void i9xx_crtc_clock_get(struct intel_crtc *crtc,
90 static void ironlake_pch_clock_get(struct intel_crtc *crtc,
97 static void i9xx_set_pipeconf(struct intel_crtc *intel_crtc);
98 static void intel_set_pipe_timings(struct intel_crtc *intel_crtc);
99 static void intel_cpu_transcoder_set_m_n(struct intel_crtc *crtc,
105 static void vlv_prepare_pll(struct intel_crtc *crtc,
107 static void chv_prepare_pll(struct intel_crtc *crtc,
111 static void skl_init_scalers(struct drm_device *dev, struct intel_crtc *intel_crtc,
115 static void skylake_pfit_enable(struct intel_crtc *crtc);
116 static void ironlake_pfit_disable(struct intel_crtc *crtc, bool force);
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Dintel_hdmi.c195 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in ibx_write_infoframe() local
196 int i, reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_write_infoframe()
210 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in ibx_write_infoframe()
215 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in ibx_write_infoframe()
230 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in ibx_infoframe_enabled() local
232 int reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in ibx_infoframe_enabled()
253 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in cpt_write_infoframe() local
254 int i, reg = TVIDEO_DIP_CTL(intel_crtc->pipe); in cpt_write_infoframe()
271 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), *data); in cpt_write_infoframe()
276 I915_WRITE(TVIDEO_DIP_DATA(intel_crtc->pipe), 0); in cpt_write_infoframe()
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Dintel_fbdev.c294 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_crtc_fb_gamma_set() local
296 intel_crtc->lut_r[regno] = red >> 8; in intel_crtc_fb_gamma_set()
297 intel_crtc->lut_g[regno] = green >> 8; in intel_crtc_fb_gamma_set()
298 intel_crtc->lut_b[regno] = blue >> 8; in intel_crtc_fb_gamma_set()
304 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_crtc_fb_gamma_get() local
306 *red = intel_crtc->lut_r[regno] << 8; in intel_crtc_fb_gamma_get()
307 *green = intel_crtc->lut_g[regno] << 8; in intel_crtc_fb_gamma_get()
308 *blue = intel_crtc->lut_b[regno] << 8; in intel_crtc_fb_gamma_get()
547 struct intel_crtc *intel_crtc; in intel_fbdev_init_bios() local
554 intel_crtc = to_intel_crtc(crtc); in intel_fbdev_init_bios()
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Dintel_atomic.c133 struct intel_crtc *intel_crtc, in intel_atomic_setup_scalers() argument
160 if (num_scalers_need > intel_crtc->num_scalers){ in intel_atomic_setup_scalers()
162 num_scalers_need, intel_crtc->num_scalers); in intel_atomic_setup_scalers()
178 idx = intel_crtc->base.base.id; in intel_atomic_setup_scalers()
209 intel_crtc->atomic.wait_for_flips = true; in intel_atomic_setup_scalers()
217 if (WARN_ON(intel_plane->pipe != intel_crtc->pipe)) { in intel_atomic_setup_scalers()
227 for (j = 0; j < intel_crtc->num_scalers; j++) { in intel_atomic_setup_scalers()
232 intel_crtc->pipe, *scaler_id, name, idx); in intel_atomic_setup_scalers()
244 if (num_scalers_need == 1 && intel_crtc->pipe != PIPE_C) { in intel_atomic_setup_scalers()
Dintel_fifo_underrun.c54 struct intel_crtc *crtc; in ivb_can_enable_err_int()
73 struct intel_crtc *crtc; in cpt_can_enable_serr_int()
97 struct intel_crtc *crtc; in i9xx_check_fifo_underruns()
235 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in __intel_set_cpu_fifo_underrun_reporting() local
240 old = !intel_crtc->cpu_fifo_underrun_disabled; in __intel_set_cpu_fifo_underrun_reporting()
241 intel_crtc->cpu_fifo_underrun_disabled = !enable; in __intel_set_cpu_fifo_underrun_reporting()
304 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_set_pch_fifo_underrun_reporting() local
319 old = !intel_crtc->pch_fifo_underrun_disabled; in intel_set_pch_fifo_underrun_reporting()
320 intel_crtc->pch_fifo_underrun_disabled = !enable; in intel_set_pch_fifo_underrun_reporting()
Dintel_ddi.c611 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in hsw_fdi_link_train() local
628 FDI_DP_PORT_WIDTH(intel_crtc->config->fdi_lanes); in hsw_fdi_link_train()
638 I915_WRITE(PORT_CLK_SEL(PORT_E), intel_crtc->config->ddi_pll_sel); in hsw_fdi_link_train()
639 WARN_ON(intel_crtc->config->ddi_pll_sel != PORT_CLK_SEL_SPLL); in hsw_fdi_link_train()
657 ((intel_crtc->config->fdi_lanes - 1) << 1) | in hsw_fdi_link_train()
741 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_ddi_get_crtc_encoder() local
752 pipe_name(intel_crtc->pipe)); in intel_ddi_get_crtc_encoder()
761 struct intel_crtc *crtc = to_intel_crtc(crtc_state->base.crtc); in intel_ddi_get_crtc_new_encoder()
1267 hsw_ddi_pll_select(struct intel_crtc *intel_crtc, in hsw_ddi_pll_select() argument
1289 pll = intel_get_shared_dpll(intel_crtc, crtc_state); in hsw_ddi_pll_select()
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Dintel_audio.c169 static bool audio_rate_need_prog(struct intel_crtc *crtc, in audio_rate_need_prog()
268 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in hsw_audio_codec_disable() local
269 enum pipe pipe = intel_crtc->pipe; in hsw_audio_codec_disable()
282 if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT)) in hsw_audio_codec_disable()
300 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in hsw_audio_codec_enable() local
301 enum pipe pipe = intel_crtc->pipe; in hsw_audio_codec_enable()
348 if (intel_pipe_has_type(intel_crtc, INTEL_OUTPUT_DISPLAYPORT)) in hsw_audio_codec_enable()
354 if (audio_rate_need_prog(intel_crtc, adjusted_mode)) { in hsw_audio_codec_enable()
378 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in ilk_audio_codec_disable() local
382 enum pipe pipe = intel_crtc->pipe; in ilk_audio_codec_disable()
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Dintel_fbc.c57 static unsigned int get_crtc_fence_y_offset(struct intel_crtc *crtc) in get_crtc_fence_y_offset()
85 static void i8xx_fbc_enable(struct intel_crtc *crtc) in i8xx_fbc_enable()
140 static void g4x_fbc_enable(struct intel_crtc *crtc) in g4x_fbc_enable()
191 static void ilk_fbc_enable(struct intel_crtc *crtc) in ilk_fbc_enable()
260 static void gen7_fbc_enable(struct intel_crtc *crtc) in gen7_fbc_enable()
331 static void intel_fbc_enable(struct intel_crtc *crtc, in intel_fbc_enable()
391 static void intel_fbc_schedule_enable(struct intel_crtc *crtc) in intel_fbc_schedule_enable()
461 void intel_fbc_disable_crtc(struct intel_crtc *crtc) in intel_fbc_disable_crtc()
706 static void intel_fbc_get_plane_source_size(struct intel_crtc *crtc, in intel_fbc_get_plane_source_size()
727 static int intel_fbc_calculate_cfb_size(struct intel_crtc *crtc) in intel_fbc_calculate_cfb_size()
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Dintel_drv.h495 struct intel_crtc *crtc;
528 struct intel_crtc { struct
670 #define to_intel_crtc(x) container_of(x, struct intel_crtc, base)
929 static inline unsigned int intel_num_planes(struct intel_crtc *crtc) in intel_num_planes()
966 int intel_get_crtc_scanline(struct intel_crtc *crtc);
984 void intel_ddi_enable_pipe_clock(struct intel_crtc *intel_crtc);
985 void intel_ddi_disable_pipe_clock(struct intel_crtc *intel_crtc);
986 bool intel_ddi_pll_select(struct intel_crtc *crtc,
1051 bool intel_pipe_has_type(struct intel_crtc *crtc, enum intel_output_type type);
1110 struct intel_shared_dpll *intel_crtc_to_shared_dpll(struct intel_crtc *crtc);
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Dintel_pm.c827 static void vlv_write_wm_values(struct intel_crtc *crtc, in vlv_write_wm_values()
937 struct intel_crtc *crtc, in vlv_compute_wm_level()
973 static void vlv_compute_fifo(struct intel_crtc *crtc) in vlv_compute_fifo()
1040 static void vlv_invert_wms(struct intel_crtc *crtc) in vlv_invert_wms()
1074 static void vlv_compute_wm(struct intel_crtc *crtc) in vlv_compute_wm()
1176 static void vlv_pipe_set_fifo_size(struct intel_crtc *crtc) in vlv_pipe_set_fifo_size()
1266 struct intel_crtc *crtc; in vlv_merge_wm()
1313 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in vlv_update_wm() local
1314 enum pipe pipe = intel_crtc->pipe; in vlv_update_wm()
1317 vlv_compute_wm(intel_crtc); in vlv_update_wm()
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Dintel_psr.c81 struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc); in intel_psr_write_vsc()
296 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_psr_match_conditions() local
315 I915_READ(HSW_STEREO_3D_CTL(intel_crtc->config->cpu_transcoder)) & in intel_psr_match_conditions()
322 intel_crtc->config->base.adjusted_mode.flags & DRM_MODE_FLAG_INTERLACE) { in intel_psr_match_conditions()
371 struct intel_crtc *crtc = to_intel_crtc(intel_dig_port->base.base.crtc); in intel_psr_enable()
440 struct intel_crtc *intel_crtc = in vlv_psr_disable() local
446 if (wait_for((I915_READ(VLV_PSRSTAT(intel_crtc->pipe)) & in vlv_psr_disable()
450 val = I915_READ(VLV_PSRCTL(intel_crtc->pipe)); in vlv_psr_disable()
454 I915_WRITE(VLV_PSRCTL(intel_crtc->pipe), val); in vlv_psr_disable()
458 WARN_ON(vlv_is_psr_active_on_pipe(dev, intel_crtc->pipe)); in vlv_psr_disable()
Dintel_dp.c1387 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_dp_compute_config() local
1427 intel_gmch_panel_fitting(intel_crtc, pipe_config, in intel_dp_compute_config()
1430 intel_pch_panel_fitting(intel_crtc, pipe_config, in intel_dp_compute_config()
1545 struct intel_crtc *crtc = to_intel_crtc(dig_port->base.base.crtc); in ironlake_set_pll_cpu_edp()
1586 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_dp_prepare()
2279 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_dp_get_config()
2363 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_disable_dp()
2405 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in chv_data_lane_soft_reset()
2573 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_enable_dp()
2712 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in vlv_init_panel_power_sequencer()
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Dintel_dsi.c377 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_dsi_port_enable() local
403 temp |= intel_crtc->pipe ? in intel_dsi_port_enable()
466 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_dsi_pre_enable() local
467 enum pipe pipe = intel_crtc->pipe; in intel_dsi_pre_enable()
489 intel_crtc->config->dpll_hw_state.dpll = in intel_dsi_pre_enable()
773 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in set_dsi_timings() local
776 unsigned int bpp = intel_crtc->config->pipe_bpp; in set_dsi_timings()
843 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->crtc); in intel_dsi_prepare() local
845 const struct drm_display_mode *adjusted_mode = &intel_crtc->config->base.adjusted_mode; in intel_dsi_prepare()
847 unsigned int bpp = intel_crtc->config->pipe_bpp; in intel_dsi_prepare()
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Dintel_dp_mst.c153 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_mst_pre_enable_dp() local
178 intel_dp_set_link_params(intel_dp, intel_crtc->config); in intel_mst_pre_enable_dp()
183 intel_crtc->config->ddi_pll_sel); in intel_mst_pre_enable_dp()
196 intel_crtc->config->pbn, &slots); in intel_mst_pre_enable_dp()
246 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_dp_mst_enc_get_config()
371 struct intel_crtc *crtc = to_intel_crtc(state->crtc); in intel_mst_atomic_best_encoder()
Dintel_atomic_plane.c110 struct intel_crtc *intel_crtc; in intel_plane_atomic_check() local
118 intel_crtc = to_intel_crtc(crtc); in intel_plane_atomic_check()
Dintel_lvds.c137 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_pre_enable_lvds()
308 struct intel_crtc *intel_crtc = to_intel_crtc(pipe_config->base.crtc); in intel_lvds_compute_config() local
312 if (INTEL_INFO(dev)->gen < 4 && intel_crtc->pipe == 0) { in intel_lvds_compute_config()
340 intel_pch_panel_fitting(intel_crtc, pipe_config, in intel_lvds_compute_config()
343 intel_gmch_panel_fitting(intel_crtc, pipe_config, in intel_lvds_compute_config()
Dintel_tv.c1025 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_tv_pre_enable() local
1069 if (intel_crtc->pipe == 1) in intel_tv_pre_enable()
1120 assert_pipe_disabled(dev_priv, intel_crtc->pipe); in intel_tv_pre_enable()
1183 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_tv_detect_type() local
1205 if (intel_crtc->pipe == 1) in intel_tv_detect_type()
Dintel_sprite.c81 void intel_pipe_update_start(struct intel_crtc *crtc) in intel_pipe_update_start()
157 void intel_pipe_update_end(struct intel_crtc *crtc) in intel_pipe_update_end()
760 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_check_sprite_plane() local
780 if (intel_plane->pipe != intel_crtc->pipe) { in intel_check_sprite_plane()
797 max_scale = skl_max_scale(intel_crtc, crtc_state); in intel_check_sprite_plane()
Di915_debugfs.c568 struct intel_crtc *crtc; in i915_gem_pageflip_info()
2801 struct intel_crtc *intel_crtc, in intel_encoder_info() argument
2806 struct drm_crtc *crtc = &intel_crtc->base; in intel_encoder_info()
2829 static void intel_crtc_info(struct seq_file *m, struct intel_crtc *intel_crtc) in intel_crtc_info() argument
2833 struct drm_crtc *crtc = &intel_crtc->base; in intel_crtc_info()
2845 intel_encoder_info(m, intel_crtc, intel_encoder); in intel_crtc_info()
2954 struct intel_crtc *crtc; in i915_display_info()
3173 struct drm_device *dev, struct intel_crtc *intel_crtc) in drrs_status_per_crtc() argument
3180 for_each_encoder_on_crtc(dev, &intel_crtc->base, intel_encoder) { in drrs_status_per_crtc()
3213 if (to_intel_crtc_state(intel_crtc->base.state)->has_drrs) { in drrs_status_per_crtc()
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Di915_drv.h288 #define for_each_intel_plane_on_crtc(dev, intel_crtc, intel_plane) \ argument
292 if ((intel_plane)->pipe == (intel_crtc)->pipe)
294 #define for_each_intel_crtc(dev, intel_crtc) \ argument
295 list_for_each_entry(intel_crtc, &dev->mode_config.crtc_list, base.head)
609 struct intel_crtc;
643 bool (*get_pipe_config)(struct intel_crtc *,
645 void (*get_initial_plane_config)(struct intel_crtc *,
647 int (*crtc_compute_clock)(struct intel_crtc *crtc,
920 struct intel_crtc *crtc;
934 struct intel_crtc *crtc;
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Dintel_dvo.c186 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_enable_dvo()
253 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_dvo_pre_enable()
Dintel_sdvo.c1011 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in intel_sdvo_set_avi_infoframe() local
1024 if (intel_crtc->config->limited_color_range) in intel_sdvo_set_avi_infoframe()
1200 struct intel_crtc *crtc = to_intel_crtc(intel_encoder->base.crtc); in intel_sdvo_pre_enable()
1448 struct intel_crtc *crtc = to_intel_crtc(encoder->base.crtc); in intel_disable_sdvo()
1490 struct intel_crtc *intel_crtc = to_intel_crtc(encoder->base.crtc); in intel_enable_sdvo() local
1501 intel_wait_for_vblank(dev, intel_crtc->pipe); in intel_enable_sdvo()
Dintel_panel.c104 intel_pch_panel_fitting(struct intel_crtc *intel_crtc, in intel_pch_panel_fitting() argument
303 void intel_gmch_panel_fitting(struct intel_crtc *intel_crtc, in intel_gmch_panel_fitting() argument
307 struct drm_device *dev = intel_crtc->base.dev; in intel_gmch_panel_fitting()
359 pfit_control |= ((intel_crtc->pipe << PFIT_PIPE_SHIFT) | in intel_gmch_panel_fitting()
Di915_trace.h20 TP_PROTO(struct intel_crtc *crtc),
46 TP_PROTO(struct intel_crtc *crtc),
71 TP_PROTO(struct intel_crtc *crtc, u32 frame, int scanline_end),
Di915_irq.c671 struct intel_crtc *intel_crtc = in i915_get_vblank_counter() local
673 const struct drm_display_mode *mode = &intel_crtc->base.hwmode; in i915_get_vblank_counter()
723 static int __intel_get_crtc_scanline(struct intel_crtc *crtc) in __intel_get_crtc_scanline()
780 struct intel_crtc *intel_crtc = to_intel_crtc(crtc); in i915_get_crtc_scanoutpos() local
824 position = __intel_get_crtc_scanline(intel_crtc); in i915_get_crtc_scanoutpos()
897 int intel_get_crtc_scanline(struct intel_crtc *crtc) in intel_get_crtc_scanline()

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