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Searched refs:reg_shift (Results 1 – 18 of 18) sorted by relevance

/drivers/gpio/
Dgpio-adnp.c17 #define GPIO_DDR(gpio) (0x00 << (gpio)->reg_shift)
18 #define GPIO_PLR(gpio) (0x01 << (gpio)->reg_shift)
19 #define GPIO_IER(gpio) (0x02 << (gpio)->reg_shift)
20 #define GPIO_ISR(gpio) (0x03 << (gpio)->reg_shift)
21 #define GPIO_PTR(gpio) (0x04 << (gpio)->reg_shift)
26 unsigned int reg_shift; member
76 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_get()
90 unsigned int reg = offset >> adnp->reg_shift; in __adnp_gpio_set()
119 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_input()
156 unsigned int reg = offset >> adnp->reg_shift; in adnp_gpio_direction_output()
[all …]
/drivers/i2c/busses/
Di2c-ocores.c31 u32 reg_shift; member
82 iowrite8(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_8()
87 iowrite16(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_16()
92 iowrite32(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_32()
97 iowrite16be(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_16be()
102 iowrite32be(value, i2c->base + (reg << i2c->reg_shift)); in oc_setreg_32be()
107 return ioread8(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_8()
112 return ioread16(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_16()
117 return ioread32(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_32()
122 return ioread16be(i2c->base + (reg << i2c->reg_shift)); in oc_getreg_16be()
[all …]
Di2c-omap.c192 int reg_shift; /* bit shift for I2C register addresses */ member
277 (omap->regs[reg] << omap->reg_shift)); in omap_i2c_write_reg()
283 (omap->regs[reg] << omap->reg_shift)); in omap_i2c_read_reg()
1338 omap->reg_shift = (omap->flags >> OMAP_I2C_FLAG_BUS_SHIFT__SHIFT) & 3; in omap_i2c_probe()
/drivers/net/ethernet/stmicro/stmmac/
Ddwmac-socfpga.c45 u32 reg_shift; member
85 u32 reg_offset, reg_shift; in socfpga_dwmac_parse_data() local
113 ret = of_property_read_u32_index(np, "altr,sysmgr-syscon", 2, &reg_shift); in socfpga_dwmac_parse_data()
134 dwmac->reg_shift = reg_shift; in socfpga_dwmac_parse_data()
146 u32 reg_shift = dwmac->reg_shift; in socfpga_dwmac_setup() local
171 ctrl &= ~(SYSMGR_EMACGRP_CTRL_PHYSEL_MASK << reg_shift); in socfpga_dwmac_setup()
172 ctrl |= val << reg_shift; in socfpga_dwmac_setup()
/drivers/ata/
Dpata_pxa.c253 (ATA_REG_DATA << pdata->reg_shift); in pxa_ata_probe()
255 (ATA_REG_ERR << pdata->reg_shift); in pxa_ata_probe()
257 (ATA_REG_FEATURE << pdata->reg_shift); in pxa_ata_probe()
259 (ATA_REG_NSECT << pdata->reg_shift); in pxa_ata_probe()
261 (ATA_REG_LBAL << pdata->reg_shift); in pxa_ata_probe()
263 (ATA_REG_LBAM << pdata->reg_shift); in pxa_ata_probe()
265 (ATA_REG_LBAH << pdata->reg_shift); in pxa_ata_probe()
267 (ATA_REG_DEVICE << pdata->reg_shift); in pxa_ata_probe()
269 (ATA_REG_STATUS << pdata->reg_shift); in pxa_ata_probe()
271 (ATA_REG_CMD << pdata->reg_shift); in pxa_ata_probe()
Dpata_of_platform.c32 unsigned int reg_shift = 0; in pata_of_platform_probe() local
55 reg_shift = be32_to_cpup(prop); in pata_of_platform_probe()
72 reg_shift, pio_mask, &pata_platform_sht); in pata_of_platform_probe()
/drivers/mfd/
Dhtc-egpio.c36 int reg_shift; /* bit shift */ member
136 return bit >> ei->reg_shift; in egpio_pos()
141 return 1 << (bit & ((1 << ei->reg_shift)-1)); in egpio_bit()
200 shift = pos << ei->reg_shift; in egpio_set()
240 shift += (1<<ei->reg_shift)) { in egpio_write_cache()
302 ei->reg_shift = fls(pdata->reg_width - 1); in egpio_probe()
303 pr_debug("reg_shift = %d\n", ei->reg_shift); in egpio_probe()
Dtimberdale.c86 .reg_shift = 2,
/drivers/tty/serial/8250/
D8250_pci.c132 return setup_port(priv, port, bar, offset, board->reg_shift); in addidata_apci7800_setup()
153 return setup_port(priv, port, bar, offset, board->reg_shift); in afavlab_setup()
218 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_hp_diva_setup()
380 return setup_port(priv, port, bar, offset, board->reg_shift); in sbs_setup()
639 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_timedia_setup()
664 return setup_port(priv, port, bar, offset, board->reg_shift); in titan_400l_800l_setup()
771 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_ni8430_setup()
787 return setup_port(priv, port, bar, 0, board->reg_shift); in pci_netmos_9900_setup()
1330 (board->reg_shift + 3); in pci_default_setup()
1335 return setup_port(priv, port, bar, offset, board->reg_shift); in pci_default_setup()
[all …]
/drivers/pinctrl/
Dpinctrl-tz1090.c1249 u32 reg, reg_shift, select, val; in tz1090_pinctrl_select() local
1263 reg_shift = pin % 30; in tz1090_pinctrl_select()
1268 val &= ~BIT(reg_shift); in tz1090_pinctrl_select()
1269 val |= select << reg_shift; in tz1090_pinctrl_select()
/drivers/base/regmap/
Dinternal.h111 int reg_shift; member
Dregmap.c579 map->reg_shift = config->pad_bits % 8; in __regmap_init()
638 switch (config->reg_bits + map->reg_shift) { in __regmap_init()
1270 map->format.format_reg(map->work_buf, reg, map->reg_shift); in _regmap_raw_write()
1856 map->format.format_reg(u8, reg, map->reg_shift); in _regmap_raw_multi_reg_write()
2172 map->format.format_reg(map->work_buf, reg, map->reg_shift); in _regmap_raw_read()
/drivers/ssb/
Ddriver_extif.c77 ports[i].reg_shift = 0; in ssb_extif_serial_init()
Ddriver_chipcommon.c692 ports[i].reg_shift = 0; in ssb_chipco_serial_init()
/drivers/bcma/
Ddriver_chipcommon.c359 ports[i].reg_shift = 0; in bcma_chipco_serial_init()
/drivers/mmc/host/
Domap.c83 #define OMAP_MMC_REG(host, reg) (OMAP_MMC_REG_##reg << (host)->reg_shift)
139 unsigned int reg_shift; member
1427 host->reg_shift = (mmc_omap7xx() ? 1 : 2); in mmc_omap_probe()
/drivers/hwmon/
Dw83795.c1455 int reg_shift; in store_temp_mode() local
1475 reg_shift = 2 * index; in store_temp_mode()
1477 tmp &= ~(0x03 << reg_shift); in store_temp_mode()
1478 tmp |= val << reg_shift; in store_temp_mode()
/drivers/tty/serial/
Dsccnxp.c957 s->port[i].regshift = s->pdata.reg_shift; in sccnxp_probe()