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Searched refs:tcr (Results 1 – 23 of 23) sorted by relevance

/drivers/clocksource/
Dtimer-keystone.c80 u32 tcr; in keystone_timer_config() local
83 tcr = keystone_timer_readl(TCR); in keystone_timer_config()
84 off = tcr & ~(TCR_ENAMODE_MASK); in keystone_timer_config()
87 tcr |= mask; in keystone_timer_config()
106 keystone_timer_writel(tcr, TCR); in keystone_timer_config()
112 u32 tcr; in keystone_timer_disable() local
114 tcr = keystone_timer_readl(TCR); in keystone_timer_disable()
117 tcr &= ~(TCR_ENAMODE_MASK); in keystone_timer_disable()
118 keystone_timer_writel(tcr, TCR); in keystone_timer_disable()
/drivers/watchdog/
Dtxx9wdt.c61 &txx9wdt_reg->tcr); in txx9wdt_start()
71 __raw_writel(__raw_readl(&txx9wdt_reg->tcr) & ~TXx9_TMTCR_TCE, in txx9wdt_stop()
72 &txx9wdt_reg->tcr); in txx9wdt_stop()
/drivers/tty/serial/
Dsunsab.h17 u8 tcr; /* Termination Character Register */ member
48 u8 tcr; member
84 u8 tcr; member
Ddz.c811 unsigned short csr, tcr, trdy, mask; in dz_console_putchar() local
817 tcr = dz_in(dport, DZ_TCR); in dz_console_putchar()
818 tcr |= 1 << dport->port.line; in dz_console_putchar()
819 mask = tcr; in dz_console_putchar()
840 dz_out(dport, DZ_TCR, tcr); in dz_console_putchar()
/drivers/dma/sh/
Drcar-hpbdma.c114 u32 tcr; /* TCR / transfer count */ member
275 ch_reg_write(hpb_chan, hw->tcr >> hpb_chan->xmit_shift, in hpb_dmae_set_reg()
372 desc->hw.tcr = *len; in hpb_dmae_desc_setup()
382 u32 tcr = ch_reg_read(chan, desc->plane_idx ? in hpb_dmae_get_partial() local
385 return (desc->hw.tcr - tcr) << chan->xmit_shift; in hpb_dmae_get_partial()
Dshdmac.c223 sh_dmae_writel(sh_chan, hw->tcr >> sh_chan->xmit_shift, TCR); in dmae_set_reg()
295 sh_desc->hw.tcr, sh_desc->hw.sar, sh_desc->hw.dar); in sh_dmae_start_xfer()
393 sh_desc->hw.tcr = *len; in sh_dmae_desc_setup()
426 return sh_desc->hw.tcr - in sh_dmae_get_partial()
470 (sh_desc->hw.dar + sh_desc->hw.tcr) == dar_buf) || in sh_dmae_desc_completed()
472 (sh_desc->hw.sar + sh_desc->hw.tcr) == sar_buf); in sh_dmae_desc_completed()
Dshdma.h51 u32 tcr; /* TCR / transfer count */ member
Drcar-dmac.c53 u32 tcr; member
709 hwdesc->tcr = chunk->size >> desc->xfer_shift; in rcar_dmac_fill_hwdesc()
/drivers/iommu/
Darm-smmu-v3.c317 #define ARM_SMMU_TCR2CD(tcr, fld) \ argument
318 (((tcr) >> ARM64_TCR_##fld##_SHIFT & ARM64_TCR_##fld##_MASK) \
527 u64 tcr; member
924 static u64 arm_smmu_cpu_tcr_to_cd(u64 tcr) in arm_smmu_cpu_tcr_to_cd() argument
929 val |= ARM_SMMU_TCR2CD(tcr, T0SZ); in arm_smmu_cpu_tcr_to_cd()
930 val |= ARM_SMMU_TCR2CD(tcr, TG0); in arm_smmu_cpu_tcr_to_cd()
931 val |= ARM_SMMU_TCR2CD(tcr, IRGN0); in arm_smmu_cpu_tcr_to_cd()
932 val |= ARM_SMMU_TCR2CD(tcr, ORGN0); in arm_smmu_cpu_tcr_to_cd()
933 val |= ARM_SMMU_TCR2CD(tcr, SH0); in arm_smmu_cpu_tcr_to_cd()
934 val |= ARM_SMMU_TCR2CD(tcr, EPD0); in arm_smmu_cpu_tcr_to_cd()
[all …]
Dio-pgtable.h60 u64 tcr; member
Dio-pgtable-arm.c715 cfg->arm_lpae_s1_cfg.tcr = reg; in arm_64_lpae_alloc_pgtable_s1()
845 cfg->arm_lpae_s1_cfg.tcr |= ARM_32_LPAE_TCR_EAE; in arm_32_lpae_alloc_pgtable_s1()
846 cfg->arm_lpae_s1_cfg.tcr &= 0xffffffff; in arm_32_lpae_alloc_pgtable_s1()
Darm-smmu.c766 reg = pgtbl_cfg->arm_lpae_s1_cfg.tcr; in arm_smmu_init_context_bank()
769 reg = pgtbl_cfg->arm_lpae_s1_cfg.tcr >> 32; in arm_smmu_init_context_bank()
/drivers/dma/bestcomm/
Dfec.c128 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_rx_reset()
229 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_fec_tx_reset()
Dgen_bd.c135 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_gen_bd_rx_reset()
219 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_gen_bd_tx_reset()
Dbestcomm.c315 out_be16(&bcom_eng->regs->tcr[task], 0); in bcom_engine_init()
349 out_be16(&bcom_eng->regs->tcr[task], 0); in bcom_engine_cleanup()
Data.c84 offsetof(struct mpc52xx_sdma, tcr[tsk->tasknum]); in bcom_ata_init()
/drivers/atm/
Didt77252.c2151 int tcr, tcra; in idt77252_init_cbr() local
2166 tcr = atm_pcr_goal(&qos->txtp); in idt77252_init_cbr()
2167 tcra = tcr >= 0 ? tcr : -tcr; in idt77252_init_cbr()
2175 if (tcr > 0) { in idt77252_init_cbr()
2178 } else if (tcr == 0) { in idt77252_init_cbr()
2220 int tcr; in idt77252_init_ubr() local
2230 tcr = atm_pcr_goal(&qos->txtp); in idt77252_init_ubr()
2231 if (tcr == 0) in idt77252_init_ubr()
2232 tcr = card->link_pcr; in idt77252_init_ubr()
2234 vc->estimator = idt77252_init_est(vc, tcr); in idt77252_init_ubr()
[all …]
Dnicstar.c1233 int tcr, tcra; /* target cell rate, and absolute value */ in ns_open() local
1288 tcr = atm_pcr_goal(&(vcc->qos.txtp)); in ns_open()
1289 tcra = tcr >= 0 ? tcr : -tcr; in ns_open()
1300 if (tcr > 0) { in ns_open()
1303 } else if (tcr == 0) { in ns_open()
/drivers/staging/vt6655/
Ddesc.h227 volatile u8 tcr; member
Ddevice_main.c849 if (desc->td1.tcr & TCR_STP) { in device_tx_srv()
1109 head_td->td1.tcr = 0; in vnt_tx_packet()
1127 head_td->td1.tcr |= (TCR_STP | TCR_EDP | EDMSDU); in vnt_tx_packet()
/drivers/net/usb/
Drtl8150.c643 u8 cr, tcr, rcr, msr; in enable_net_traffic() local
650 tcr = 0xd8; in enable_net_traffic()
655 set_registers(dev, TCR, 1, &tcr); in enable_net_traffic()
/drivers/tty/
Dsynclink_gt.c4488 unsigned short tcr; in tx_set_idle() local
4493 tcr = rd_reg16(info, TCR); in tx_set_idle()
4496 tcr = (tcr & ~(BIT6 + BIT5)) | BIT4; in tx_set_idle()
4499 } else if (!(tcr & BIT6)) { in tx_set_idle()
4501 tcr &= ~(BIT5 + BIT4); in tx_set_idle()
4503 wr_reg16(info, TCR, tcr); in tx_set_idle()
/drivers/net/can/
Drcar_can.c80 u8 tcr; /* Test Control Register */ member