Home
last modified time | relevance | path

Searched refs:d (Results 1 – 25 of 793) sorted by relevance

12345678910>>...32

/arch/alpha/lib/
Dmemcpy.c25 #define ALIGN_DEST_TO8_UP(d,s,n) \ argument
26 while (d & 7) { \
29 *(char *) d = *(char *) s; \
30 d++; s++; \
32 #define ALIGN_DEST_TO8_DN(d,s,n) \ argument
33 while (d & 7) { \
36 d--; s--; \
37 *(char *) d = *(char *) s; \
44 #define DO_REST_UP(d,s,n) \ argument
47 *(char *) d = *(char *) s; \
[all …]
/arch/cris/include/arch-v32/mach-fs/mach/
Dstartup.inc10 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
11 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
12 move.d $r0, [$r1]
14 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
15 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
16 move.d $r0, [$r1]
18 move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
19 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
20 move.d $r0, [$r1]
22 move.d CONFIG_ETRAX_DEF_GIO_PB_OE, $r0
[all …]
/arch/powerpc/net/
Dbpf_jit.h35 #define PLANT_INSTR(d, idx, instr) \ argument
36 do { if (d) { (d)[idx] = instr; } idx++; } while (0)
45 #define PPC_ADDI(d, a, i) EMIT(PPC_INST_ADDI | ___PPC_RT(d) | \ argument
47 #define PPC_MR(d, a) PPC_OR(d, a, a) argument
49 #define PPC_ADDIS(d, a, i) EMIT(PPC_INST_ADDIS | \ argument
50 ___PPC_RT(d) | ___PPC_RA(a) | IMM_L(i))
112 #define PPC_SUB(d, a, b) EMIT(PPC_INST_SUB | ___PPC_RT(d) | \ argument
114 #define PPC_ADD(d, a, b) EMIT(PPC_INST_ADD | ___PPC_RT(d) | \ argument
116 #define PPC_MULD(d, a, b) EMIT(PPC_INST_MULLD | ___PPC_RT(d) | \ argument
118 #define PPC_MULW(d, a, b) EMIT(PPC_INST_MULLW | ___PPC_RT(d) | \ argument
[all …]
/arch/cris/include/arch-v32/mach-a3/mach/
Dstartup.inc13 or.d \BITS, \OUTREG
18 move.d CONFIG_ETRAX_DEF_GIO_PA_OUT, $r0
19 move.d REG_ADDR(gio, regi_gio, rw_pa_dout), $r1
20 move.d $r0, [$r1]
22 move.d CONFIG_ETRAX_DEF_GIO_PA_OE, $r0
23 move.d REG_ADDR(gio, regi_gio, rw_pa_oe), $r1
24 move.d $r0, [$r1]
26 move.d CONFIG_ETRAX_DEF_GIO_PB_OUT, $r0
27 move.d REG_ADDR(gio, regi_gio, rw_pb_dout), $r1
28 move.d $r0, [$r1]
[all …]
/arch/mips/kernel/
Dr2300_fpu.S50 EX2(s.d $f0, 0(a0))
51 EX2(s.d $f2, 16(a0))
52 EX2(s.d $f4, 32(a0))
53 EX2(s.d $f6, 48(a0))
54 EX2(s.d $f8, 64(a0))
55 EX2(s.d $f10, 80(a0))
56 EX2(s.d $f12, 96(a0))
57 EX2(s.d $f14, 112(a0))
58 EX2(s.d $f16, 128(a0))
59 EX2(s.d $f18, 144(a0))
[all …]
/arch/arm/mach-mmp/
Dmmp2.h38 struct pxa_device_desc *d = NULL; in mmp2_add_uart() local
41 case 1: d = &mmp2_device_uart1; break; in mmp2_add_uart()
42 case 2: d = &mmp2_device_uart2; break; in mmp2_add_uart()
43 case 3: d = &mmp2_device_uart3; break; in mmp2_add_uart()
44 case 4: d = &mmp2_device_uart4; break; in mmp2_add_uart()
49 return pxa_register_device(d, NULL, 0); in mmp2_add_uart()
55 struct pxa_device_desc *d = NULL; in mmp2_add_twsi() local
59 case 1: d = &mmp2_device_twsi1; break; in mmp2_add_twsi()
60 case 2: d = &mmp2_device_twsi2; break; in mmp2_add_twsi()
61 case 3: d = &mmp2_device_twsi3; break; in mmp2_add_twsi()
[all …]
Dpxa168.h50 struct pxa_device_desc *d = NULL; in pxa168_add_uart() local
53 case 1: d = &pxa168_device_uart1; break; in pxa168_add_uart()
54 case 2: d = &pxa168_device_uart2; break; in pxa168_add_uart()
55 case 3: d = &pxa168_device_uart3; break; in pxa168_add_uart()
58 if (d == NULL) in pxa168_add_uart()
61 return pxa_register_device(d, NULL, 0); in pxa168_add_uart()
67 struct pxa_device_desc *d = NULL; in pxa168_add_twsi() local
71 case 0: d = &pxa168_device_twsi0; break; in pxa168_add_twsi()
72 case 1: d = &pxa168_device_twsi1; break; in pxa168_add_twsi()
81 return pxa_register_device(d, data, sizeof(*data)); in pxa168_add_twsi()
[all …]
Dpxa910.h35 struct pxa_device_desc *d = NULL; in pxa910_add_uart() local
38 case 1: d = &pxa910_device_uart1; break; in pxa910_add_uart()
39 case 2: d = &pxa910_device_uart2; break; in pxa910_add_uart()
42 if (d == NULL) in pxa910_add_uart()
45 return pxa_register_device(d, NULL, 0); in pxa910_add_uart()
51 struct pxa_device_desc *d = NULL; in pxa910_add_twsi() local
55 case 0: d = &pxa910_device_twsi0; break; in pxa910_add_twsi()
56 case 1: d = &pxa910_device_twsi1; break; in pxa910_add_twsi()
65 return pxa_register_device(d, data, sizeof(*data)); in pxa910_add_twsi()
70 struct pxa_device_desc *d = NULL; in pxa910_add_pwm() local
[all …]
/arch/cris/arch-v10/lib/
Ddram_init.S22 move.d CONFIG_ETRAX_DEF_R_WAITSTATES, $r0
23 move.d $r0, [R_WAITSTATES]
25 move.d CONFIG_ETRAX_DEF_R_BUS_CONFIG, $r0
26 move.d $r0, [R_BUS_CONFIG]
29 move.d CONFIG_ETRAX_DEF_R_DRAM_CONFIG, $r0
30 move.d $r0, [R_DRAM_CONFIG]
32 move.d CONFIG_ETRAX_DEF_R_DRAM_TIMING, $r0
33 move.d $r0, [R_DRAM_TIMING]
42 move.d CONFIG_ETRAX_DEF_R_SDRAM_CONFIG, $r0
43 move.d $r0, [R_SDRAM_CONFIG]
[all …]
/arch/mips/include/asm/
Dasmmacro-32.h19 s.d $f0, THREAD_FPR0(\thread)
20 s.d $f2, THREAD_FPR2(\thread)
21 s.d $f4, THREAD_FPR4(\thread)
22 s.d $f6, THREAD_FPR6(\thread)
23 s.d $f8, THREAD_FPR8(\thread)
24 s.d $f10, THREAD_FPR10(\thread)
25 s.d $f12, THREAD_FPR12(\thread)
26 s.d $f14, THREAD_FPR14(\thread)
27 s.d $f16, THREAD_FPR16(\thread)
28 s.d $f18, THREAD_FPR18(\thread)
[all …]
/arch/unicore32/boot/compressed/
Dmisc.c46 unsigned char *d = (unsigned char *)dest, *s = (unsigned char *)src; in memcpy() local
49 *d++ = *s++; in memcpy()
50 *d++ = *s++; in memcpy()
51 *d++ = *s++; in memcpy()
52 *d++ = *s++; in memcpy()
53 *d++ = *s++; in memcpy()
54 *d++ = *s++; in memcpy()
55 *d++ = *s++; in memcpy()
56 *d++ = *s++; in memcpy()
60 *d++ = *s++; in memcpy()
[all …]
/arch/arm/mach-sa1100/
Dneponset.c171 struct neponset_drvdata *d = irq_desc_get_handler_data(desc); in neponset_irq_handler() local
185 irr = readb_relaxed(d->base + IRR); in neponset_irq_handler()
208 generic_handle_irq(d->irq_base + NEP_IRQ_SMC91X); in neponset_irq_handler()
211 generic_handle_irq(d->irq_base + NEP_IRQ_USAR); in neponset_irq_handler()
217 generic_handle_irq(d->irq_base + NEP_IRQ_SA1111); in neponset_irq_handler()
239 struct neponset_drvdata *d; in neponset_probe() local
291 d = kzalloc(sizeof(*d), GFP_KERNEL); in neponset_probe()
292 if (!d) { in neponset_probe()
297 d->base = ioremap(nep_res->start, SZ_4K); in neponset_probe()
298 if (!d->base) { in neponset_probe()
[all …]
/arch/cris/arch-v32/mach-a3/
Ddram_init.S28 move.d 10000, $r2
33 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_cfg), $r0
34 move.d REG_STATE(ddr2, rw_phy_cfg, en, yes), $r1
35 move.d $r1, [$r0]
38 move.d 10000, $r2
43 move.d REG_ADDR(ddr2, regi_ddr2_ctrl, rw_phy_ctrl), $r0
44 move.d REG_STATE(ddr2, rw_phy_ctrl, rst, yes) | \
46 move.d $r1, [$r0]
47 move.d REG_STATE(ddr2, rw_phy_ctrl, cal_start, yes), $r1
48 move.d $r1, [$r0]
[all …]
/arch/x86/crypto/
Ddes3_ede-asm_64.S89 movl val##d, RT0d; \
99 orl RT0d, val##d;
102 do_permutation(left##d, right##d, 4, 0x0f0f0f0f); \
103 do_permutation(left##d, right##d, 16, 0x0000ffff); \
104 do_permutation(right##d, left##d, 2, 0x33333333); \
105 do_permutation(right##d, left##d, 8, 0x00ff00ff); \
107 movl left##d, RW0d; \
108 roll $1, right##d; \
109 xorl right##d, RW0d; \
111 xorl RW0d, left##d; \
[all …]
/arch/cris/arch-v32/mach-fs/
Ddram_init.S28 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp0), $r0
29 move.d CONFIG_ETRAX_SDRAM_GRP0_CONFIG, $r1
30 move.d $r1, [$r0]
31 move.d REG_ADDR(bif_core, regi_bif_core, rw_sdram_cfg_grp1), $r0
32 move.d CONFIG_ETRAX_SDRAM_GRP1_CONFIG, $r1
33 move.d $r1, [$r0]
42 move.d CONFIG_ETRAX_SDRAM_COMMAND, $r2
46 move.d 0x40, $r4 ; Assume 32 bits and CAS latency = 2
47 move.d CONFIG_ETRAX_SDRAM_TIMING, $r1
48 and.d 0x07, $r1 ; Get CAS latency
[all …]
/arch/arm/boot/compressed/
Dstring.c12 unsigned char *d = (unsigned char *)__dest, *s = (unsigned char *)__src; in memcpy() local
15 *d++ = *s++; in memcpy()
16 *d++ = *s++; in memcpy()
17 *d++ = *s++; in memcpy()
18 *d++ = *s++; in memcpy()
19 *d++ = *s++; in memcpy()
20 *d++ = *s++; in memcpy()
21 *d++ = *s++; in memcpy()
22 *d++ = *s++; in memcpy()
26 *d++ = *s++; in memcpy()
[all …]
/arch/cris/arch-v32/kernel/
Dkgdb_asm.S21 move.d $acr, [$sp]
308 move.d internal_stack+1020, $sp ; Use the internal stack which grows upwards
318 clear.d $r1 ; Bank counter
319 move.d sreg, $acr
326 move.d [$acr], $r0
329 move.d [$acr], $r0
332 move.d [$acr], $r0
335 move.d [$acr], $r0
338 move.d [$acr], $r0
341 move.d [$acr], $r0
[all …]
/arch/parisc/include/asm/
Dparisc-device.h42 #define to_parisc_device(d) container_of(d, struct parisc_device, dev) argument
43 #define to_parisc_driver(d) container_of(d, struct parisc_driver, drv) argument
44 #define parisc_parent(d) to_parisc_device(d->dev.parent) argument
46 static inline const char *parisc_pathname(struct parisc_device *d) in parisc_pathname() argument
48 return dev_name(&d->dev); in parisc_pathname()
52 parisc_set_drvdata(struct parisc_device *d, void *p) in parisc_set_drvdata() argument
54 dev_set_drvdata(&d->dev, p); in parisc_set_drvdata()
58 parisc_get_drvdata(struct parisc_device *d) in parisc_get_drvdata() argument
60 return dev_get_drvdata(&d->dev); in parisc_get_drvdata()
/arch/sparc/include/asm/
Dio_32.h9 #define memset_io(d,c,sz) _memset_io(d,c,sz) argument
10 #define memcpy_fromio(d,s,sz) _memcpy_fromio(d,s,sz) argument
11 #define memcpy_toio(d,s,sz) _memcpy_toio(d,s,sz) argument
18 volatile void __iomem *d = dst; in _memset_io() local
21 writeb(c, d); in _memset_io()
22 d++; in _memset_io()
29 char *d = dst; in _memcpy_fromio() local
33 *d++ = tmp; in _memcpy_fromio()
42 volatile void __iomem *d = dst; in _memcpy_toio() local
46 writeb(tmp, d); in _memcpy_toio()
[all …]
/arch/cris/boot/compressed/
Dhead_v10.S29 cmp.d RAM_INIT_MAGIC, $r8 ; Already initialized?
55 move.d 0x40800000, $sp
62 basse: move.d $pc, $r5
63 and.d 0x7fffffff, $r5 ; strip any non-cache bit
64 subq 2, $r5 ; compensate for the move.d $pc instr
65 move.d $r5, $r0 ; save for later - flash address of 'basse'
66 add.d _edata, $r5
67 sub.d basse, $r5 ; $r5 = flash address of '_edata'
71 move.d basse, $r1 ; destination
72 move.d _edata, $r2 ; end destination
[all …]
/arch/x86/purgatory/
Dsha256.c50 u32 a, b, c, d, e, f, g, h, t1, t2; in sha256_transform() local
63 a = state[0]; b = state[1]; c = state[2]; d = state[3]; in sha256_transform()
68 t2 = e0(a) + Maj(a, b, c); d += t1; h = t1 + t2; in sha256_transform()
69 t1 = g + e1(d) + Ch(d, e, f) + 0x71374491 + W[1]; in sha256_transform()
71 t1 = f + e1(c) + Ch(c, d, e) + 0xb5c0fbcf + W[2]; in sha256_transform()
73 t1 = e + e1(b) + Ch(b, c, d) + 0xe9b5dba5 + W[3]; in sha256_transform()
75 t1 = d + e1(a) + Ch(a, b, c) + 0x3956c25b + W[4]; in sha256_transform()
76 t2 = e0(e) + Maj(e, f, g); h += t1; d = t1 + t2; in sha256_transform()
78 t2 = e0(d) + Maj(d, e, f); g += t1; c = t1 + t2; in sha256_transform()
80 t2 = e0(c) + Maj(c, d, e); f += t1; b = t1 + t2; in sha256_transform()
[all …]
/arch/microblaze/include/asm/
Dhash.h61 unsigned int b, c, d; in __hash_32()
69 d = c << 7; /* 7 18 */ in __hash_32()
70 d += b; /* 1 19 */ in __hash_32()
71 d <<= 8; /* 8 27 */ in __hash_32()
72 d += a; /* 1 28 */ in __hash_32()
73 d <<= 1; /* 1 29 */ in __hash_32()
74 d += b; /* 1 30 */ in __hash_32()
75 d <<= 6; /* 6 36 */ in __hash_32()
76 return d + c; /* 1 37 total instructions*/ in __hash_32()
/arch/powerpc/crypto/
Dmd5-asm.S69 #define R_00_15(a, b, c, d, w0, w1, p, q, off, k0h, k0l, k1h, k1l) \ argument
73 andc rT1,d,b; /* 1: f' = ~b and d */ \
83 add d,d,w1; /* 2: a = a + wk */ \
88 add d,d,rT0; /* 2: a = a + f */ \
90 rotrwi d,d,q; /* 2: a = a rotl x */ \
91 add d,d,a; /* 2: a = a + b */
93 #define R_16_31(a, b, c, d, w0, w1, p, q, k0h, k0l, k1h, k1l) \ argument
94 andc rT0,c,d; /* 1: f = c and ~d */ \
95 and rT1,b,d; /* 1: f' = b and d */ \
106 add d,d,w1; /* 2: a = a + wk */ \
[all …]
/arch/arm/mach-rpc/
Dirq.c10 static void iomd_ack_irq_a(struct irq_data *d) in iomd_ack_irq_a() argument
14 mask = 1 << d->irq; in iomd_ack_irq_a()
20 static void iomd_mask_irq_a(struct irq_data *d) in iomd_mask_irq_a() argument
24 mask = 1 << d->irq; in iomd_mask_irq_a()
29 static void iomd_unmask_irq_a(struct irq_data *d) in iomd_unmask_irq_a() argument
33 mask = 1 << d->irq; in iomd_unmask_irq_a()
44 static void iomd_mask_irq_b(struct irq_data *d) in iomd_mask_irq_b() argument
48 mask = 1 << (d->irq & 7); in iomd_mask_irq_b()
53 static void iomd_unmask_irq_b(struct irq_data *d) in iomd_unmask_irq_b() argument
57 mask = 1 << (d->irq & 7); in iomd_unmask_irq_b()
[all …]
/arch/sparc/crypto/
Dopcodes.h29 #define AES_EROUND01(a,b,c,d) \ argument
30 .word (F3F(2, 0x19, 0)|RS1(a)|RS2(b)|RS3(c)|RD(d));
31 #define AES_EROUND23(a,b,c,d) \ argument
32 .word (F3F(2, 0x19, 1)|RS1(a)|RS2(b)|RS3(c)|RD(d));
33 #define AES_DROUND01(a,b,c,d) \ argument
34 .word (F3F(2, 0x19, 2)|RS1(a)|RS2(b)|RS3(c)|RD(d));
35 #define AES_DROUND23(a,b,c,d) \ argument
36 .word (F3F(2, 0x19, 3)|RS1(a)|RS2(b)|RS3(c)|RD(d));
37 #define AES_EROUND01_L(a,b,c,d) \ argument
38 .word (F3F(2, 0x19, 4)|RS1(a)|RS2(b)|RS3(c)|RD(d));
[all …]

12345678910>>...32