| /drivers/net/ |
| D | sb1000.c | 93 static int card_wait_for_busy_clear(const int ioaddr[],
95 static int card_wait_for_ready(const int ioaddr[], const char* name,
97 static int card_send_command(const int ioaddr[], const char* name,
101 static int sb1000_wait_for_ready(const int ioaddr[], const char* name);
102 static int sb1000_wait_for_ready_clear(const int ioaddr[],
104 static void sb1000_send_command(const int ioaddr[], const char* name,
106 static void sb1000_read_status(const int ioaddr[], unsigned char in[]);
107 static void sb1000_issue_read_command(const int ioaddr[],
111 static int sb1000_reset(const int ioaddr[], const char* name);
112 static int sb1000_check_CRC(const int ioaddr[], const char* name);
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| /drivers/net/ethernet/realtek/ |
| D | atp.c | 192 static int atp_probe1(long ioaddr);
194 static unsigned short eeprom_op(long ioaddr, unsigned int cmd);
197 static void write_packet(long ioaddr, int length, unsigned char *packet, int pad, int mode);
198 static void trigger_send(long ioaddr, int length);
203 static void read_block(long ioaddr, int length, unsigned char *buffer, int data_mode);
231 long ioaddr = *port; in atp_init() local
232 outb(0x57, ioaddr + PAR_DATA); in atp_init()
233 if (inb(ioaddr + PAR_DATA) != 0x57) in atp_init()
235 if (atp_probe1(ioaddr) == 0) in atp_init()
253 static int __init atp_probe1(long ioaddr) in atp_probe1() argument
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| D | atp.h | 107 static inline unsigned char read_byte_mode0(short ioaddr) in read_byte_mode0() argument
111 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL); in read_byte_mode0()
112 inbyte(ioaddr + PAR_STATUS); in read_byte_mode0()
113 low_nib = (inbyte(ioaddr + PAR_STATUS) >> 3) & 0x0f; in read_byte_mode0()
114 outb(Ctrl_HNibRead, ioaddr + PAR_CONTROL); in read_byte_mode0()
115 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode0()
116 inbyte(ioaddr + PAR_STATUS); /* Settling time delay -- needed! */ in read_byte_mode0()
117 return low_nib | ((inbyte(ioaddr + PAR_STATUS) << 1) & 0xf0); in read_byte_mode0()
121 static inline unsigned char read_byte_mode2(short ioaddr) in read_byte_mode2() argument
125 outb(Ctrl_LNibRead, ioaddr + PAR_CONTROL); in read_byte_mode2()
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| /drivers/net/ethernet/samsung/sxgbe/ |
| D | sxgbe_core.c | 24 static void sxgbe_core_init(void __iomem *ioaddr) in sxgbe_core_init() argument
29 regval = readl(ioaddr + SXGBE_CORE_TX_CONFIG_REG); in sxgbe_core_init()
34 writel(regval, ioaddr + SXGBE_CORE_TX_CONFIG_REG); in sxgbe_core_init()
37 regval = readl(ioaddr + SXGBE_CORE_RX_CONFIG_REG); in sxgbe_core_init()
43 writel(regval, ioaddr + SXGBE_CORE_RX_CONFIG_REG); in sxgbe_core_init()
47 static void sxgbe_core_dump_regs(void __iomem *ioaddr) in sxgbe_core_dump_regs() argument
51 static int sxgbe_get_lpi_status(void __iomem *ioaddr, const u32 irq_status) in sxgbe_get_lpi_status() argument
57 lpi_status = readl(ioaddr + SXGBE_CORE_LPI_CTRL_STATUS); in sxgbe_get_lpi_status()
72 static int sxgbe_core_host_irq_status(void __iomem *ioaddr, in sxgbe_core_host_irq_status() argument
77 irq_status = readl(ioaddr + SXGBE_CORE_INT_STATUS_REG); in sxgbe_core_host_irq_status()
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| D | sxgbe_mtl.c | 23 static void sxgbe_mtl_init(void __iomem *ioaddr, unsigned int etsalg, in sxgbe_mtl_init() argument
28 reg_val = readl(ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
43 writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
53 writel(reg_val, ioaddr + SXGBE_MTL_OP_MODE_REG); in sxgbe_mtl_init()
57 static void sxgbe_mtl_dma_dm_rxqueue(void __iomem *ioaddr) in sxgbe_mtl_dma_dm_rxqueue() argument
59 writel(RX_QUEUE_DYNAMIC, ioaddr + SXGBE_MTL_RXQ_DMAMAP0_REG); in sxgbe_mtl_dma_dm_rxqueue()
60 writel(RX_QUEUE_DYNAMIC, ioaddr + SXGBE_MTL_RXQ_DMAMAP1_REG); in sxgbe_mtl_dma_dm_rxqueue()
61 writel(RX_QUEUE_DYNAMIC, ioaddr + SXGBE_MTL_RXQ_DMAMAP2_REG); in sxgbe_mtl_dma_dm_rxqueue()
64 static void sxgbe_mtl_set_txfifosize(void __iomem *ioaddr, int queue_num, in sxgbe_mtl_set_txfifosize() argument
71 reg_val = readl(ioaddr + SXGBE_MTL_TXQ_OPMODE_REG(queue_num)); in sxgbe_mtl_set_txfifosize()
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| D | sxgbe_dma.c | 24 static int sxgbe_dma_init(void __iomem *ioaddr, int fix_burst, int burst_map) in sxgbe_dma_init() argument
28 reg_val = readl(ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); in sxgbe_dma_init()
41 writel(reg_val, ioaddr + SXGBE_DMA_SYSBUS_MODE_REG); in sxgbe_dma_init()
46 static void sxgbe_dma_channel_init(void __iomem *ioaddr, int cha_num, in sxgbe_dma_channel_init() argument
53 reg_val = readl(ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()
57 writel(reg_val, ioaddr + SXGBE_DMA_CHA_CTL_REG(cha_num)); in sxgbe_dma_channel_init()
59 reg_val = readl(ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()
61 writel(reg_val, ioaddr + SXGBE_DMA_CHA_TXCTL_REG(cha_num)); in sxgbe_dma_channel_init()
63 reg_val = readl(ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cha_num)); in sxgbe_dma_channel_init()
65 writel(reg_val, ioaddr + SXGBE_DMA_CHA_RXCTL_REG(cha_num)); in sxgbe_dma_channel_init()
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| /drivers/net/ethernet/smsc/ |
| D | smc9194.c | 268 static int smc_probe(struct net_device *dev, int ioaddr);
290 static void smc_reset( int ioaddr );
293 static void smc_enable( int ioaddr );
296 static void smc_shutdown( int ioaddr );
300 static int smc_findirq( int ioaddr );
319 static void smc_reset( int ioaddr ) in smc_reset() argument
324 outw( RCR_SOFTRESET, ioaddr + RCR ); in smc_reset()
331 outw( RCR_CLEAR, ioaddr + RCR ); in smc_reset()
332 outw( TCR_CLEAR, ioaddr + TCR ); in smc_reset()
338 outw( inw( ioaddr + CONTROL ) | CTL_AUTO_RELEASE , ioaddr + CONTROL ); in smc_reset()
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| /drivers/net/ethernet/stmicro/stmmac/ |
| D | dwmac4_lib.c | 17 int dwmac4_dma_reset(void __iomem *ioaddr) in dwmac4_dma_reset() argument
19 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()
24 writel(value, ioaddr + DMA_BUS_MODE); in dwmac4_dma_reset()
27 if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET)) in dwmac4_dma_reset()
38 void dwmac4_set_rx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan) in dwmac4_set_rx_tail_ptr() argument
40 writel(tail_ptr, ioaddr + DMA_CHAN_RX_END_ADDR(0)); in dwmac4_set_rx_tail_ptr()
43 void dwmac4_set_tx_tail_ptr(void __iomem *ioaddr, u32 tail_ptr, u32 chan) in dwmac4_set_tx_tail_ptr() argument
45 writel(tail_ptr, ioaddr + DMA_CHAN_TX_END_ADDR(0)); in dwmac4_set_tx_tail_ptr()
48 void dwmac4_dma_start_tx(void __iomem *ioaddr) in dwmac4_dma_start_tx() argument
50 u32 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(STMMAC_CHAN0)); in dwmac4_dma_start_tx()
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| D | dwmac_lib.c | 29 int dwmac_dma_reset(void __iomem *ioaddr) in dwmac_dma_reset() argument
31 u32 value = readl(ioaddr + DMA_BUS_MODE); in dwmac_dma_reset()
36 writel(value, ioaddr + DMA_BUS_MODE); in dwmac_dma_reset()
39 if (!(readl(ioaddr + DMA_BUS_MODE) & DMA_BUS_MODE_SFT_RESET)) in dwmac_dma_reset()
51 void dwmac_enable_dma_transmission(void __iomem *ioaddr) in dwmac_enable_dma_transmission() argument
53 writel(1, ioaddr + DMA_XMT_POLL_DEMAND); in dwmac_enable_dma_transmission()
56 void dwmac_enable_dma_irq(void __iomem *ioaddr) in dwmac_enable_dma_irq() argument
58 writel(DMA_INTR_DEFAULT_MASK, ioaddr + DMA_INTR_ENA); in dwmac_enable_dma_irq()
61 void dwmac_disable_dma_irq(void __iomem *ioaddr) in dwmac_disable_dma_irq() argument
63 writel(0, ioaddr + DMA_INTR_ENA); in dwmac_disable_dma_irq()
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| D | dwmac4_dma.c | 20 static void dwmac4_dma_axi(void __iomem *ioaddr, struct stmmac_axi *axi) in dwmac4_dma_axi() argument
22 u32 value = readl(ioaddr + DMA_SYS_BUS_MODE); in dwmac4_dma_axi()
71 writel(value, ioaddr + DMA_SYS_BUS_MODE); in dwmac4_dma_axi()
74 static void dwmac4_dma_init_channel(void __iomem *ioaddr, int pbl, in dwmac4_dma_init_channel() argument
83 value = readl(ioaddr + DMA_CHAN_CONTROL(channel)); in dwmac4_dma_init_channel()
85 writel(value, ioaddr + DMA_CHAN_CONTROL(channel)); in dwmac4_dma_init_channel()
87 value = readl(ioaddr + DMA_CHAN_TX_CONTROL(channel)); in dwmac4_dma_init_channel()
89 writel(value, ioaddr + DMA_CHAN_TX_CONTROL(channel)); in dwmac4_dma_init_channel()
91 value = readl(ioaddr + DMA_CHAN_RX_CONTROL(channel)); in dwmac4_dma_init_channel()
93 writel(value, ioaddr + DMA_CHAN_RX_CONTROL(channel)); in dwmac4_dma_init_channel()
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| D | dwmac1000_core.c | 38 void __iomem *ioaddr = hw->pcsr; in dwmac1000_core_init() local
39 u32 value = readl(ioaddr + GMAC_CONTROL); in dwmac1000_core_init()
64 writel(value, ioaddr + GMAC_CONTROL); in dwmac1000_core_init()
74 writel(value, ioaddr + GMAC_INT_MASK); in dwmac1000_core_init()
78 writel(0x0, ioaddr + GMAC_VLAN_TAG); in dwmac1000_core_init()
84 void __iomem *ioaddr = hw->pcsr; in dwmac1000_rx_ipc_enable() local
85 u32 value = readl(ioaddr + GMAC_CONTROL); in dwmac1000_rx_ipc_enable()
92 writel(value, ioaddr + GMAC_CONTROL); in dwmac1000_rx_ipc_enable()
94 value = readl(ioaddr + GMAC_CONTROL); in dwmac1000_rx_ipc_enable()
101 void __iomem *ioaddr = hw->pcsr; in dwmac1000_dump_regs() local
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| D | stmmac_hwtstamp.c | 31 static void stmmac_config_hw_tstamping(void __iomem *ioaddr, u32 data) in stmmac_config_hw_tstamping() argument
33 writel(data, ioaddr + PTP_TCR); in stmmac_config_hw_tstamping()
36 static u32 stmmac_config_sub_second_increment(void __iomem *ioaddr, in stmmac_config_sub_second_increment() argument
39 u32 value = readl(ioaddr + PTP_TCR); in stmmac_config_sub_second_increment()
62 writel(reg_value, ioaddr + PTP_SSIR); in stmmac_config_sub_second_increment()
67 static int stmmac_init_systime(void __iomem *ioaddr, u32 sec, u32 nsec) in stmmac_init_systime() argument
72 writel(sec, ioaddr + PTP_STSUR); in stmmac_init_systime()
73 writel(nsec, ioaddr + PTP_STNSUR); in stmmac_init_systime()
75 value = readl(ioaddr + PTP_TCR); in stmmac_init_systime()
77 writel(value, ioaddr + PTP_TCR); in stmmac_init_systime()
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| D | dwmac4_core.c | 25 void __iomem *ioaddr = hw->pcsr; in dwmac4_core_init() local
26 u32 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_core_init()
50 writel(value, ioaddr + GMAC_CONFIG); in dwmac4_core_init()
59 writel(value, ioaddr + GMAC_INT_EN); in dwmac4_core_init()
64 void __iomem *ioaddr = hw->pcsr; in dwmac4_dump_regs() local
67 pr_debug("\tDWMAC4 regs (base addr = 0x%p)\n", ioaddr); in dwmac4_dump_regs()
73 offset, readl(ioaddr + offset)); in dwmac4_dump_regs()
79 void __iomem *ioaddr = hw->pcsr; in dwmac4_rx_ipc_enable() local
80 u32 value = readl(ioaddr + GMAC_CONFIG); in dwmac4_rx_ipc_enable()
87 writel(value, ioaddr + GMAC_CONFIG); in dwmac4_rx_ipc_enable()
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| /drivers/net/ethernet/3com/ |
| D | 3c509.c | 120 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
190 static ushort read_eeprom(int ioaddr, int index);
272 static void el3_dev_fill(struct net_device *dev, __be16 *phys_addr, int ioaddr, in el3_dev_fill() argument
278 dev->base_addr = ioaddr; in el3_dev_fill()
287 int ioaddr, isa_irq, if_port, err; in el3_isa_match() local
298 ioaddr = 0x200 + ((iobase & 0x1f) << 4); in el3_isa_match()
311 if (!request_region(ioaddr, EL3_IO_EXTENT, "3c509-isa")) { in el3_isa_match()
320 outb((ioaddr >> 4) | 0xe0, id_port); in el3_isa_match()
323 if (inw(ioaddr) != 0x6d50) { in el3_isa_match()
329 outw(0x0f00, ioaddr + WN0_IRQ); in el3_isa_match()
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| D | 3c574_cs.c | 131 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
220 static void mdio_sync(unsigned int ioaddr, int bits);
221 static int mdio_read(unsigned int ioaddr, int phy_id, int location);
222 static void mdio_write(unsigned int ioaddr, int phy_id, int location,
224 static unsigned short read_eeprom(unsigned int ioaddr, int index);
309 unsigned int ioaddr; in tc574_config() local
342 ioaddr = dev->base_addr; in tc574_config()
357 phys_addr[i] = htons(read_eeprom(ioaddr, i + 10)); in tc574_config()
371 outw(2<<11, ioaddr + RunnerRdCtrl); in tc574_config()
372 mcr = inb(ioaddr + 2); in tc574_config()
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| D | 3c515.c | 175 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
367 static int corkscrew_setup(struct net_device *dev, int ioaddr,
446 static int check_device(unsigned ioaddr) in check_device() argument
450 if (!request_region(ioaddr, CORKSCREW_TOTAL_SIZE, "3c515")) in check_device()
453 if ((inw(ioaddr + 0x2002) & 0x1f0) != (ioaddr & 0x1f0)) { in check_device()
454 release_region(ioaddr, CORKSCREW_TOTAL_SIZE); in check_device()
458 outw(EEPROM_Read + 7, ioaddr + Wn0EepromCmd); in check_device()
462 if ((inw(ioaddr + Wn0EepromCmd) & 0x0200) == 0) in check_device()
465 if (inw(ioaddr + Wn0EepromData) != 0x6d50) { in check_device()
466 release_region(ioaddr, CORKSCREW_TOTAL_SIZE); in check_device()
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| D | 3c589_cs.c | 68 #define EL3WINDOW(win_num) outw(SelectWindow + (win_num), ioaddr + EL3_CMD)
164 static u16 read_eeprom(unsigned int ioaddr, int index);
244 unsigned int ioaddr; in tc589_config() local
281 ioaddr = dev->base_addr; in tc589_config()
295 phys_addr[i] = htons(read_eeprom(ioaddr, i)); in tc589_config()
307 outw(0x3f00, ioaddr + 8); in tc589_config()
308 fifo = inl(ioaddr); in tc589_config()
382 static u16 read_eeprom(unsigned int ioaddr, int index) in read_eeprom() argument
385 outw(EEPROM_READ + index, ioaddr + 10); in read_eeprom()
388 if ((inw(ioaddr + 10) & EEPROM_BUSY) == 0) in read_eeprom()
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| /drivers/net/arcnet/ |
| D | com90io.c | 73 int ioaddr = dev->base_addr; in get_buffer_byte() local
75 arcnet_outb(offset >> 8, ioaddr, COM9026_REG_W_ADDR_HI); in get_buffer_byte()
76 arcnet_outb(offset & 0xff, ioaddr, COM9026_REG_W_ADDR_LO); in get_buffer_byte()
78 return arcnet_inb(ioaddr, COM9026_REG_RW_MEMDATA); in get_buffer_byte()
85 int ioaddr = dev->base_addr; in put_buffer_byte() local
87 arcnet_outb(offset >> 8, ioaddr, COM9026_REG_W_ADDR_HI); in put_buffer_byte()
88 arcnet_outb(offset & 0xff, ioaddr, COM9026_REG_W_ADDR_LO); in put_buffer_byte()
90 arcnet_outb(datum, ioaddr, COM9026_REG_RW_MEMDATA); in put_buffer_byte()
98 int ioaddr = dev->base_addr; in get_whole_buffer() local
100 arcnet_outb((offset >> 8) | AUTOINCflag, ioaddr, COM9026_REG_W_ADDR_HI); in get_whole_buffer()
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| D | com20020.c | 65 int ioaddr = dev->base_addr, ofs = 512 * bufnum + offset; in com20020_copy_from_card() local
69 ioaddr, COM20020_REG_W_ADDR_HI); in com20020_copy_from_card()
70 arcnet_outb(ofs & 0xff, ioaddr, COM20020_REG_W_ADDR_LO); in com20020_copy_from_card()
74 arcnet_insb(ioaddr, COM20020_REG_RW_MEMDATA, buf, count)); in com20020_copy_from_card()
80 int ioaddr = dev->base_addr, ofs = 512 * bufnum + offset; in com20020_copy_to_card() local
83 arcnet_outb((ofs >> 8) | AUTOINCflag, ioaddr, COM20020_REG_W_ADDR_HI); in com20020_copy_to_card()
84 arcnet_outb(ofs & 0xff, ioaddr, COM20020_REG_W_ADDR_LO); in com20020_copy_to_card()
88 arcnet_outsb(ioaddr, COM20020_REG_RW_MEMDATA, buf, count)); in com20020_copy_to_card()
94 int ioaddr = dev->base_addr, status; in com20020_check() local
97 arcnet_outb(XTOcfg(3) | RESETcfg, ioaddr, COM20020_REG_W_CONFIG); in com20020_check()
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| /drivers/net/appletalk/ |
| D | cops.c | 180 static int cops_probe1 (struct net_device *dev, int ioaddr);
181 static int cops_irq (int ioaddr, int board);
274 static int __init cops_probe1(struct net_device *dev, int ioaddr) in cops_probe1() argument
285 if (!request_region(ioaddr, COPS_IO_EXTENT, dev->name)) in cops_probe1()
300 dev->irq = cops_irq(ioaddr, board); in cops_probe1()
334 dev->base_addr = ioaddr; in cops_probe1()
349 dev->name, cardname, ioaddr, dev->irq); in cops_probe1()
353 dev->name, cardname, ioaddr, dev->irq); in cops_probe1()
356 dev->name, cardname, ioaddr); in cops_probe1()
362 release_region(ioaddr, COPS_IO_EXTENT); in cops_probe1()
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| /drivers/rtc/ |
| D | rtc-stk17ta8.c | 64 void __iomem *ioaddr; member
79 void __iomem *ioaddr = pdata->ioaddr; in stk17ta8_rtc_set_time() local
82 flags = readb(pdata->ioaddr + RTC_FLAGS); in stk17ta8_rtc_set_time()
83 writeb(flags | RTC_WRITE, pdata->ioaddr + RTC_FLAGS); in stk17ta8_rtc_set_time()
85 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in stk17ta8_rtc_set_time()
86 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in stk17ta8_rtc_set_time()
87 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in stk17ta8_rtc_set_time()
88 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in stk17ta8_rtc_set_time()
89 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in stk17ta8_rtc_set_time()
90 writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); in stk17ta8_rtc_set_time()
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| D | rtc-ds1553.c | 63 void __iomem *ioaddr; member
78 void __iomem *ioaddr = pdata->ioaddr; in ds1553_rtc_set_time() local
83 writeb(RTC_WRITE, pdata->ioaddr + RTC_CONTROL); in ds1553_rtc_set_time()
85 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in ds1553_rtc_set_time()
86 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in ds1553_rtc_set_time()
87 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in ds1553_rtc_set_time()
88 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in ds1553_rtc_set_time()
89 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in ds1553_rtc_set_time()
90 writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); in ds1553_rtc_set_time()
91 writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); in ds1553_rtc_set_time()
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| D | rtc-ds1742.c | 65 void __iomem *ioaddr = pdata->ioaddr_rtc; in ds1742_rtc_set_time() local
70 writeb(RTC_WRITE, ioaddr + RTC_CONTROL); in ds1742_rtc_set_time()
72 writeb(bin2bcd(tm->tm_year % 100), ioaddr + RTC_YEAR); in ds1742_rtc_set_time()
73 writeb(bin2bcd(tm->tm_mon + 1), ioaddr + RTC_MONTH); in ds1742_rtc_set_time()
74 writeb(bin2bcd(tm->tm_wday) & RTC_DAY_MASK, ioaddr + RTC_DAY); in ds1742_rtc_set_time()
75 writeb(bin2bcd(tm->tm_mday), ioaddr + RTC_DATE); in ds1742_rtc_set_time()
76 writeb(bin2bcd(tm->tm_hour), ioaddr + RTC_HOURS); in ds1742_rtc_set_time()
77 writeb(bin2bcd(tm->tm_min), ioaddr + RTC_MINUTES); in ds1742_rtc_set_time()
78 writeb(bin2bcd(tm->tm_sec) & RTC_SECONDS_MASK, ioaddr + RTC_SECONDS); in ds1742_rtc_set_time()
81 writeb(RTC_WRITE | (century & RTC_CENTURY_MASK), ioaddr + RTC_CENTURY); in ds1742_rtc_set_time()
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| /drivers/net/ethernet/fujitsu/ |
| D | fmvj18x_cs.c | 304 unsigned int ioaddr; in ungermann_try_io_port() local
309 for (ioaddr = 0x300; ioaddr < 0x3e0; ioaddr += 0x20) { in ungermann_try_io_port()
310 link->resource[0]->start = ioaddr; in ungermann_try_io_port()
332 unsigned int ioaddr; in fmvj18x_config() local
441 ioaddr = dev->base_addr; in fmvj18x_config()
445 outb(CONFIG0_RST, ioaddr + CONFIG_0); in fmvj18x_config()
447 outb(CONFIG0_RST_1, ioaddr + CONFIG_0); in fmvj18x_config()
451 outb(BANK_0, ioaddr + CONFIG_1); in fmvj18x_config()
453 outb(BANK_0U, ioaddr + CONFIG_1); in fmvj18x_config()
494 dev->dev_addr[i] = inb(ioaddr + UNGERMANN_MAC_ID + i); in fmvj18x_config()
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| /drivers/net/ethernet/dec/tulip/ |
| D | pnic.c | 22 void __iomem *ioaddr = tp->base_addr; in pnic_do_nway() local
23 u32 phy_reg = ioread32(ioaddr + 0xB8); in pnic_do_nway()
33 iowrite32(0x32 | (dev->if_port & 1), ioaddr + CSR12); in pnic_do_nway()
35 iowrite32(0x1F868, ioaddr + 0xB8); in pnic_do_nway()
55 void __iomem *ioaddr = tp->base_addr; in pnic_lnk_change() local
56 int phy_reg = ioread32(ioaddr + 0xB8); in pnic_lnk_change()
61 if (ioread32(ioaddr + CSR5) & TPLnkFail) { in pnic_lnk_change()
62 iowrite32((ioread32(ioaddr + CSR7) & ~TPLnkFail) | TPLnkPass, ioaddr + CSR7); in pnic_lnk_change()
70 iowrite32(tp->csr6, ioaddr + CSR6); in pnic_lnk_change()
71 iowrite32(0x30, ioaddr + CSR12); in pnic_lnk_change()
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