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/Documentation/devicetree/bindings/pinctrl/
Dqcom,qcs404-pinctrl.txt189 reg = <0x01000000 0x200000>,
190 <0x01300000 0x200000>,
191 <0x07b00000 0x200000>;
196 gpio-ranges = <&tlmm 0 0 120>;
Dqcom,sdm660-pinctrl.txt181 reg = <0x3100000 0x200000>,
182 <0x3500000 0x200000>,
183 <0x3900000 0x200000>;
187 gpio-ranges = <&tlmm 0 0 114>;
/Documentation/devicetree/bindings/net/
Dipq806x-dwmac.txt23 reg = <0x37000000 0x200000>;
/Documentation/devicetree/bindings/phy/
Dphy-da8xx-usb.txt8 controllers on DA8xx SoCs. Consumers of this device should use index 0 for
18 reg = <0x1417c 0x14>;
28 reg = <0x200000 0x1000>;
30 phys = <&usb_phy 0>;
36 reg = <0x225000 0x1000>;
/Documentation/devicetree/bindings/mtd/
Dorion-nand.txt9 - cle : Address line number connected to CLE. Default is 0
23 cle = <0>;
28 reg = <0xf4000000 0x400>;
30 partition@0 {
32 reg = <0x0000000 0x100000>;
38 reg = <0x0100000 0x200000>;
43 reg = <0x0300000 0x100000>;
48 reg = <0x0400000 0x7d00000>;
Dnxp-spifi.txt5 mode 0 or 3. The controller operates in either command or memory
25 - spi-cpol : Controller only supports mode 0 and 3 so either
37 reg = <0x40003000 0x1000>, <0x14000000 0x4000000>;
44 flash@0 {
52 partition@0 {
54 reg = <0 0x200000>;
Dgpmc-nor.txt27 typically 0 as this is the start of the chip-select.
42 reg = <0x6e000000 0x1000>;
49 ranges = <0 0 0x10000000 0x08000000>;
51 nor@0,0 {
56 reg = <0 0 0x08000000>;
60 gpmc,cs-on-ns = <0>;
81 partition@0 {
83 reg = <0 0x40000>;
87 reg = <0x40000 0x40000>;
91 reg = <0x80000 0x200000>;
[all …]
Dpartition.txt68 flash@0 {
74 partition@0 {
76 reg = <0x0000000 0x100000>;
81 reg = <0x0100000 0x200000>;
93 partition@0 {
95 reg = <0x00000000 0x1 0x00000000>;
107 partition@0 {
109 reg = <0x0 0x00000000 0x2 0x00000000>;
115 reg = <0x2 0x00000000 0x1 0x00000000>;
126 partition@0 {
[all …]
/Documentation/devicetree/bindings/arm/msm/
Dqcom,llcc.txt38 reg = <0x1100000 0x200000>, <0x1300000 0x50000> ;
/Documentation/devicetree/bindings/soc/qcom/
Dqcom,smem.txt30 at 0xfa00000 and the RPM message ram at 0xfc428000:
38 reg = <0xfa00000 0x200000>;
55 reg = <0xfc428000 0x4000>;
/Documentation/devicetree/bindings/crypto/
Dinside-secure-safexcel.txt30 reg = <0x800000 0x200000>;
/Documentation/devicetree/bindings/soc/fsl/
Dbman-portals.txt44 ranges = <0 0xf 0xf4000000 0x200000>;
46 bman-portal@0 {
47 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
48 reg = <0x0 0x4000>, <0x100000 0x1000>;
49 interrupts = <105 2 0 0>;
52 compatible = "fsl,bman-portal-1.0.0", "fsl,bman-portal";
53 reg = <0x4000 0x4000>, <0x101000 0x1000>;
54 interrupts = <107 2 0 0>;
Dqman-portals.txt92 ranges = <0 0xf 0xf4200000 0x200000>;
94 qman-portal@0 {
95 compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
96 reg = <0 0x4000>, <0x100000 0x1000>;
97 interrupts = <104 2 0 0>;
99 fsl,qman-channel-id = <0>;
102 fsl,liodn = <0x21>;
106 fsl,liodn = <0xa1>;
110 fsl,liodn = <0x41 0x66>;
115 compatible = "fsl,qman-portal-1.2.0", "fsl,qman-portal";
[all …]
/Documentation/devicetree/bindings/arm/socionext/
Dcache-uniphier.txt29 reg = <0x500c0000 0x2000>, <0x503c0100 0x4>,
30 <0x506c0000 0x400>;
32 cache-size = <0x80000>;
41 reg = <0x500c0000 0x2000>, <0x503c0100 0x8>,
42 <0x506c0000 0x400>;
44 cache-size = <0x200000>;
53 reg = <0x500c8000 0x2000>, <0x503c8100 0x8>,
54 <0x506c8000 0x400>;
56 cache-size = <0x400000>;
/Documentation/devicetree/bindings/mailbox/
Dbrcm,iproc-flexrm-mbox.txt45 reg = <0x67000000 0x200000>;
46 msi-parent = <&gic_its 0x7f00>;
52 reg = <0x672c0000 0x1000>;
53 mboxes = <&crypto_mbox 0 0x1 0xffff>,
54 <&crypto_mbox 1 0x1 0xffff>,
55 <&crypto_mbox 16 0x1 0xffff>,
56 <&crypto_mbox 17 0x1 0xffff>,
57 <&crypto_mbox 30 0x1 0xffff>,
58 <&crypto_mbox 31 0x1 0xffff>;
/Documentation/devicetree/bindings/display/
Datmel,lcdc.txt32 reg = <0x00500000 0x1000>;
33 interrupts = <23 3 0>;
35 pinctrl-0 = <&pinctrl_fb>;
46 reg = <0x00700000 0x1000 0x70000000 0x200000>;
69 atmel,dmacon = <0x1>;
70 atmel,lcdcon2 = <0x80008002>;
/Documentation/hwmon/
Dw83791d.rst10 Addresses scanned: I2C 0x2c - 0x2f
40 (default 0)
49 (default 0)
51 Use 'reset=1' to reset the chip (via index 0x40, bit 7). The default
56 a certain chip. Example usage is `force_subclients=0,0x2f,0x4a,0x4b`
57 to force the subclients of chip 0x2f on bus 0 to i2c addresses
58 0x4a and 0x4b.
90 set for each fan separately. Valid values range from 0 (stop) to 255 (full).
157 in0 (VCORE) 0x000001 0x000001
158 in1 (VINR0) 0x000002 0x002000 <== mismatch
[all …]
/Documentation/media/v4l-drivers/
Dsaa7134.rst62 - 32.11 MHz -> .audio_clock=0x187de7
63 - 24.576MHz -> .audio_clock=0x200000 (xtal * .audio_clock = 51539600)
97 - 0=Radio 1=TV
/Documentation/devicetree/bindings/edac/
Dapm-xgene-edac.txt53 reg = <0x0 0x7e200000 0x0 0x1000>;
58 reg = <0x0 0x7e700000 0x0 0x1000>;
63 reg = <0x0 0x7e720000 0x0 0x1000>;
68 reg = <0x0 0x1054a000 0x0 0x20>;
73 reg = <0x0 0x7e000000 0x0 0x10>;
86 reg = <0x0 0x78800000 0x0 0x100>;
87 interrupts = <0x0 0x20 0x4>,
88 <0x0 0x21 0x4>,
89 <0x0 0x27 0x4>;
93 reg = <0x0 0x7e800000 0x0 0x1000>;
[all …]
/Documentation/devicetree/bindings/net/wireless/
Dqcom,ath10k.txt96 pcie@0 {
97 reg = <0 0 0 0 0>;
103 wifi@0,0 {
104 reg = <0 0 0 0 0>;
115 reg = <0xa000000 0x200000>;
134 interrupts = <0 0x20 0x1>,
135 <0 0x21 0x1>,
136 <0 0x22 0x1>,
137 <0 0x23 0x1>,
138 <0 0x24 0x1>,
[all …]
/Documentation/devicetree/bindings/interrupt-controller/
Darm,gic-v3.yaml33 enum: [ 0, 1, 2 ]
46 The 1st cell is the interrupt type; 0 for SPI interrupts, 1 for PPI
51 SPI interrupts are in the range [0-987]. PPI interrupts are in the
52 range [0-15]. Extented SPI interrupts are in the range [0-1023].
53 Extended PPI interrupts are in the range [0-127].
56 bits[3:0] trigger type and level flags.
68 of 0 if present.
96 - multipleOf: 0x10000
97 exclusiveMinimum: 0
140 "^interrupt-partition-[0-9]+$":
[all …]
/Documentation/filesystems/ext4/
Dinodes.rst24 is no inode 0.
40 * - 0x0
44 * - 0x2
48 * - 0x4
52 * - 0x8
58 * - 0xC
65 * - 0x10
72 * - 0x14
76 * - 0x18
80 * - 0x1A
[all …]
/Documentation/admin-guide/kdump/
Dkdump.rst38 with the region [0, crashkernel region size] and then the kdump kernel
39 runs in [0, crashkernel region size]. Therefore no relocatable kernel is
198 If you are using a relocatable kernel use CONFIG_PHYSICAL_START=0x100000
207 Generally X is 16MB (0x1000000). So you can set
208 CONFIG_PHYSICAL_START=0x1000000
235 kernel at run time. This is done by specifying the base address as 0,
238 crashkernel=256M@0
300 starting at physical address 0x01000000 (16MB) for the dump-capture kernel.
320 the kernel, X if explicitly specified, must be aligned to 2MiB (0x200000).
473 If die() is called, and it happens to be a thread with pid 0 or 1, or die()
[all …]
/Documentation/devicetree/bindings/opp/
Dqcom-nvmem-cpufreq.txt47 0: MSM8996 V3, speedbin 0
51 4: MSM8996 SG, speedbin 0
61 #size-cells = <0>;
63 CPU0: cpu@0 {
66 reg = <0x0 0x0>;
68 clocks = <&kryocc 0>;
82 reg = <0x0 0x1>;
84 clocks = <&kryocc 0>;
94 reg = <0x0 0x100>;
110 reg = <0x0 0x101>;
[all …]