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/Documentation/devicetree/bindings/spi/
Dsh-msiof.txt46 - num-cs : Total number of chip selects (default is 1).
47 Up to 3 native chip selects are supported:
51 Hardware limitations related to chip selects:
52 - Native chip selects are always deasserted in
55 - All slaves using native chip selects must use the
58 - When using GPIO chip selects, at least one native
Dfsl-imx-cspi.txt22 - cs-gpios : GPIOs to use as chip selects, see spi-bus.txt. While the native chip
24 word of a transfer. Most use cases will require GPIO based chip selects to
28 - num-cs : Number of total chip selects, see spi-bus.txt.
Dspi-controller.yaml30 GPIOs used as chip selects.
31 If that property is used, the number of chip selects will be
32 increased automatically with max(cs-gpios, hardware chip selects).
48 Total number of chip selects.
Dspi-cadence.txt14 - num-cs : Number of chip selects used.
16 chip selects after the decoder.
Dspi-davinci.txt18 - num-cs: Number of chip selects. This includes internal as well as
19 GPIO chip selects.
39 - cs-gpios: gpio chip selects
Dspi-armada-3700.txt11 - num-cs: The number of chip selects that is supported by this SPI Controller
Dspi-xilinx.txt11 - xlnx,num-ss-bits : Number of chip selects used.
Dspi-pxa2xx.txt12 - cs-gpios: list of GPIO chip selects. See the SPI bus bindings,
Dspi-zynq-qspi.txt14 - num-cs : Number of chip selects used.
/Documentation/devicetree/bindings/bus/
Dqcom,ebi2.txt10 NOR flash memories), WE (write enable). This on top of 6 different chip selects
20 The chip selects have the following memory range assignments. This region of
37 this is something just used on the FAST chip selects and that the SLOW
38 chip selects are understood fully. There is also a "byte device enable"
43 together, or if some chip selects are hardwired to be FAST and others are SLOW
76 Optional properties arrays for SLOW chip selects:
95 Optional properties arrays for FAST chip selects:
/Documentation/devicetree/bindings/dma/
Dfsl-imx-sdma.txt110 SDMA remap. Bit 15 of GPR0 selects between UART4_RX and SAI1_RX.
111 Setting bit 15 to 1 selects SAI1_RX.
113 SDMA remap. Bit 16 of GPR0 selects between UART4_TX and SAI1_TX.
114 Setting bit 16 to 1 selects SAI1_TX.
/Documentation/ABI/testing/
Dsysfs-bus-iio-counter-104-quad-878 scale attribute selects the encoder phase division (scale of 1
79 selects full-cycle, scale of 0.5 selects half-cycle, scale of
80 0.25 selects quarter-cycle) processed by the channel Y counter.
Dsysfs-class-led-trigger-usbport11 Echoing "1" value selects USB port. Echoing "0" unselects it.
Dsysfs-platform-i2c-demux-pinctrl17 This file selects/shows the active I2C master for a demultiplexed
/Documentation/devicetree/bindings/mtd/
Daspeed-smc.txt5 three chip selects, two of which are always of SPI type and the third
9 chip selects.
/Documentation/admin-guide/device-mapper/
Ddm-queue-length.rst6 which selects a path with the least number of in-flight I/Os.
32 dm-queue-length selects a path with the minimum 'in-flight'.
Ddm-service-time.rst6 which selects a path with the shortest estimated service time for
51 Basically, dm-service-time selects a path having minimum service time
/Documentation/devicetree/bindings/pinctrl/
Dqcom,pmic-mpp.txt134 Definition: Selects the power source for the specified pins. Valid power
140 Definition: Selects the source for analog output. Valued values are
147 Definition: Selects which dtest rail to be routed in the various functions.
153 Definition: Selects the source for analog input. Valid values are
Dqcom,pmic-gpio.txt174 Definition: Selects the power source for the specified pins. Valid
181 Definition: Selects the drive strength for the specified pins. Value
212 Definition: Selects ATEST rail to route to GPIO when it's configured
219 Definition: Selects DTEST rail to route to GPIO when it's configured
/Documentation/devicetree/bindings/c6x/
Demifa.txt5 SoCs. This interface provides external busses with a number of chip selects.
27 Configuration values for each of the supported chip selects.
/Documentation/kbuild/
DKconfig.recursion-issue-0215 # annotate this, all features that driver A selects cannot now be negated by
28 # CORE_BELL_A has some advanced feature CORE_BELL_A_ADVANCED which selects
/Documentation/media/uapi/v4l/
Dvidioc-dbg-g-register.rst73 selects the nth non-sub-device chip on the TV card. The number zero
74 always selects the host chip, e. g. the chip connected to the PCI or USB
79 selects the nth sub-device.
Dvidioc-dbg-g-chip-info.rst65 selects the nth bridge 'chip' on the TV card. You can enumerate all
68 zero always selects the bridge chip itself, e. g. the chip connected to
73 selects the nth sub-device. This allows you to enumerate over all
/Documentation/devicetree/bindings/sound/
Dcs35l36.txt37 Selects the source of the BST_CTL target VBST voltage for the boost
88 - cirrus,irq-drive-select : Selects the driver type of the selected interrupt
94 - cirrus,irq-gpio-select : Selects the pin to serve as the programmable
/Documentation/devicetree/bindings/hwmon/
Dmax6650.txt17 driver selects closed-loop mode and the requested speed.

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