| /arch/mips/pci/ |
| D | pci-malta.c | 30 .start = 0x00000000UL,
81 resource_size_t start, end, map, start1, end1, map1, map2, map3, mask; in mips_pcibios_init() local
103 start = GT_READ(GT_PCI0M0LD_OFS); in mips_pcibios_init()
106 end = (end & GT_PCI_HD_MSK) | (start & ~GT_PCI_HD_MSK); in mips_pcibios_init()
112 if (end1 - start1 > end - start) { in mips_pcibios_init()
113 start = start1; in mips_pcibios_init()
117 mask = ~(start ^ end); in mips_pcibios_init()
119 BUG_ON((start & GT_PCI_HD_MSK) != (map & GT_PCI_HD_MSK) && in mips_pcibios_init()
121 gt64120_mem_resource.start = start; in mips_pcibios_init()
123 gt64120_controller.mem_offset = (start & mask) - (map & mask); in mips_pcibios_init()
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| /arch/hexagon/mm/ |
| D | cache.c | 12 #define spanlines(start, end) \ argument
13 (((end - (start & ~(LINESIZE - 1))) >> LINEBITS) + 1)
15 void flush_dcache_range(unsigned long start, unsigned long end) in flush_dcache_range() argument
17 unsigned long lines = spanlines(start, end-1); in flush_dcache_range()
20 start &= ~(LINESIZE - 1); in flush_dcache_range()
28 : "r" (start) in flush_dcache_range()
30 start += LINESIZE; in flush_dcache_range()
35 void flush_icache_range(unsigned long start, unsigned long end) in flush_icache_range() argument
37 unsigned long lines = spanlines(start, end-1); in flush_icache_range()
40 start &= ~(LINESIZE - 1); in flush_icache_range()
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| /arch/nds32/mm/ |
| D | proc.c | 172 void cpu_icache_inval_page(unsigned long start) in cpu_icache_inval_page() argument
177 end = start + PAGE_SIZE; in cpu_icache_inval_page()
188 } while (end != start); in cpu_icache_inval_page()
192 void cpu_dcache_inval_page(unsigned long start) in cpu_dcache_inval_page() argument
197 end = start + PAGE_SIZE; in cpu_dcache_inval_page()
208 } while (end != start); in cpu_dcache_inval_page()
211 void cpu_dcache_wb_page(unsigned long start) in cpu_dcache_wb_page() argument
217 end = start + PAGE_SIZE; in cpu_dcache_wb_page()
228 } while (end != start); in cpu_dcache_wb_page()
233 void cpu_dcache_wbinval_page(unsigned long start) in cpu_dcache_wbinval_page() argument
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| /arch/arm/mm/ |
| D | cache-feroceon-l2.c | 73 static inline void l2_clean_pa_range(unsigned long start, unsigned long end) in l2_clean_pa_range() argument
82 BUG_ON((start ^ end) >> PAGE_SHIFT); in l2_clean_pa_range()
84 va_start = l2_get_va(start); in l2_clean_pa_range()
85 va_end = va_start + (end - start); in l2_clean_pa_range()
104 static inline void l2_inv_pa_range(unsigned long start, unsigned long end) in l2_inv_pa_range() argument
113 BUG_ON((start ^ end) >> PAGE_SHIFT); in l2_inv_pa_range()
115 va_start = l2_get_va(start); in l2_inv_pa_range()
116 va_end = va_start + (end - start); in l2_inv_pa_range()
142 static unsigned long calc_range_end(unsigned long start, unsigned long end) in calc_range_end() argument
146 BUG_ON(start & (CACHE_LINE_SIZE - 1)); in calc_range_end()
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| D | cache-xsc3l2.c | 86 static void xsc3_l2_inv_range(unsigned long start, unsigned long end) in xsc3_l2_inv_range() argument
90 if (start == 0 && end == -1ul) { in xsc3_l2_inv_range()
100 if (start & (CACHE_LINE_SIZE - 1)) { in xsc3_l2_inv_range()
101 vaddr = l2_map_va(start & ~(CACHE_LINE_SIZE - 1), vaddr); in xsc3_l2_inv_range()
104 start = (start | (CACHE_LINE_SIZE - 1)) + 1; in xsc3_l2_inv_range()
110 while (start < (end & ~(CACHE_LINE_SIZE - 1))) { in xsc3_l2_inv_range()
111 vaddr = l2_map_va(start, vaddr); in xsc3_l2_inv_range()
113 start += CACHE_LINE_SIZE; in xsc3_l2_inv_range()
119 if (start < end) { in xsc3_l2_inv_range()
120 vaddr = l2_map_va(start, vaddr); in xsc3_l2_inv_range()
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| D | init.c | 56 phys_initrd_start = __virt_to_phys(tag->u.initrd.start); in parse_tag_initrd()
65 phys_initrd_start = tag->u.initrd.start; in parse_tag_initrd2()
147 unsigned long start = memblock_region_memory_base_pfn(reg); in zone_sizes_init() local
150 if (start < max_low) { in zone_sizes_init()
152 zhole_size[0] -= low_end - start; in zone_sizes_init()
156 unsigned long high_start = max(start, max_low); in zone_sizes_init()
210 phys_addr_t start; in arm_initrd_init() local
224 start = round_down(phys_initrd_start, PAGE_SIZE); in arm_initrd_init()
225 size = phys_initrd_size + (phys_initrd_start - start); in arm_initrd_init()
228 if (!memblock_is_region_memory(start, size)) { in arm_initrd_init()
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| /arch/csky/mm/ |
| D | cachev2.c | 9 inline void dcache_wb_line(unsigned long start) in dcache_wb_line() argument
11 asm volatile("dcache.cval1 %0\n"::"r"(start):"memory"); in dcache_wb_line()
15 void icache_inv_range(unsigned long start, unsigned long end) in icache_inv_range() argument
17 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in icache_inv_range()
30 void dcache_wb_range(unsigned long start, unsigned long end) in dcache_wb_range() argument
32 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in dcache_wb_range()
39 void dcache_inv_range(unsigned long start, unsigned long end) in dcache_inv_range() argument
41 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in dcache_inv_range()
48 void cache_wbinv_range(unsigned long start, unsigned long end) in cache_wbinv_range() argument
50 unsigned long i = start & ~(L1_CACHE_BYTES - 1); in cache_wbinv_range()
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| D | cachev1.c | 44 unsigned int start, in cache_op_range() argument
53 if (unlikely((end - start) >= PAGE_SIZE) || in cache_op_range()
54 unlikely(start < PAGE_OFFSET) || in cache_op_range()
55 unlikely(start >= PAGE_OFFSET + LOWMEM_LIMIT)) { in cache_op_range()
67 i = start & ~(L1_CACHE_BYTES - 1); in cache_op_range()
80 void dcache_wb_line(unsigned long start) in dcache_wb_line() argument
83 cache_op_line(start, DATA_CACHE|CACHE_CLR); in dcache_wb_line()
87 void icache_inv_range(unsigned long start, unsigned long end) in icache_inv_range() argument
89 cache_op_range(start, end, INS_CACHE|CACHE_INV, 0); in icache_inv_range()
97 void dcache_wb_range(unsigned long start, unsigned long end) in dcache_wb_range() argument
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| D | dma-mapping.c | 18 void (*fn)(unsigned long start, unsigned long end)) in cache_op() argument
21 void *start = __va(page_to_phys(page)); in cache_op() local
32 start = kmap_atomic(page); in cache_op()
34 fn((unsigned long)start + offset, in cache_op()
35 (unsigned long)start + offset + len); in cache_op()
37 kunmap_atomic(start); in cache_op()
39 fn((unsigned long)start + offset, in cache_op()
40 (unsigned long)start + offset + len); in cache_op()
45 start += PAGE_SIZE; in cache_op()
50 static void dma_wbinv_set_zero_range(unsigned long start, unsigned long end) in dma_wbinv_set_zero_range() argument
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| D | tlb.c | 47 void flush_tlb_range(struct vm_area_struct *vma, unsigned long start, in flush_tlb_range() argument
52 start &= TLB_ENTRY_SIZE_MASK; in flush_tlb_range()
57 while (start < end) { in flush_tlb_range()
58 asm volatile("tlbi.vas %0"::"r"(start | newpid)); in flush_tlb_range()
59 start += 2*PAGE_SIZE; in flush_tlb_range()
68 while (start < end) { in flush_tlb_range()
71 write_mmu_entryhi(start | newpid); in flush_tlb_range()
72 start += 2*PAGE_SIZE; in flush_tlb_range()
84 void flush_tlb_kernel_range(unsigned long start, unsigned long end) in flush_tlb_kernel_range() argument
86 start &= TLB_ENTRY_SIZE_MASK; in flush_tlb_kernel_range()
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| /arch/arm/mach-omap1/ |
| D | mcbsp.c | 97 .start = OMAP7XX_MCBSP1_BASE,
103 .start = INT_7XX_McBSP1RX,
108 .start = INT_7XX_McBSP1TX,
113 .start = 9,
118 .start = 8,
124 .start = OMAP7XX_MCBSP2_BASE,
130 .start = INT_7XX_McBSP2RX,
135 .start = INT_7XX_McBSP2TX,
140 .start = 11,
145 .start = 10,
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| /arch/x86/kernel/ |
| D | probe_roms.c | 27 .start = 0xf0000,
34 .start = 0xe0000,
41 .start = 0xc8000,
46 .start = 0,
51 .start = 0,
56 .start = 0,
61 .start = 0,
66 .start = 0,
73 .start = 0xc0000,
127 rom = isa_bus_to_virt(res->start); in find_oprom()
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| /arch/nios2/mm/ |
| D | cacheflush.c | 18 static void __flush_dcache(unsigned long start, unsigned long end) in __flush_dcache() argument
22 start &= ~(cpuinfo.dcache_line_size - 1); in __flush_dcache()
26 if (end > start + cpuinfo.dcache_size) in __flush_dcache()
27 end = start + cpuinfo.dcache_size; in __flush_dcache()
29 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __flush_dcache()
37 static void __invalidate_dcache(unsigned long start, unsigned long end) in __invalidate_dcache() argument
41 start &= ~(cpuinfo.dcache_line_size - 1); in __invalidate_dcache()
45 for (addr = start; addr < end; addr += cpuinfo.dcache_line_size) { in __invalidate_dcache()
53 static void __flush_icache(unsigned long start, unsigned long end) in __flush_icache() argument
57 start &= ~(cpuinfo.icache_line_size - 1); in __flush_icache()
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| /arch/x86/boot/compressed/ |
| D | kaslr.c | 118 if (one->start + one->size <= two->start) in mem_overlaps()
121 if (one->start >= two->start + two->size) in mem_overlaps()
136 parse_memmap(char *p, unsigned long long *start, unsigned long long *size) in parse_memmap() argument
156 *start = memparse(p + 1, &p); in parse_memmap()
168 *start = 0; in parse_memmap()
184 unsigned long long start, size; in mem_avoid_memmap() local
190 rc = parse_memmap(str, &start, &size); in mem_avoid_memmap()
195 if (start == 0) { in mem_avoid_memmap()
203 mem_avoid[MEM_AVOID_MEMMAP_BEGIN + i].start = start; in mem_avoid_memmap()
381 mem_avoid[MEM_AVOID_ZO_RANGE].start = input; in mem_avoid_init()
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| /arch/powerpc/mm/ |
| D | init_64.c | 91 static int __meminit vmemmap_populated(unsigned long start, int page_size) in vmemmap_populated() argument
93 unsigned long end = start + page_size; in vmemmap_populated()
94 start = (unsigned long)(pfn_to_page(vmemmap_section_start(start))); in vmemmap_populated()
96 for (; start < end; start += (PAGES_PER_SECTION * sizeof(struct page))) in vmemmap_populated()
97 if (pfn_valid(page_to_pfn((struct page *)start))) in vmemmap_populated()
157 unsigned long start, in vmemmap_list_populate() argument
169 vmem_back->virt_addr = start; in vmemmap_list_populate()
175 static bool altmap_cross_boundary(struct vmem_altmap *altmap, unsigned long start, in altmap_cross_boundary() argument
179 unsigned long start_pfn = page_to_pfn((struct page *)start); in altmap_cross_boundary()
190 int __meminit vmemmap_populate(unsigned long start, unsigned long end, int node, in vmemmap_populate() argument
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| /arch/powerpc/include/asm/ |
| D | head-64.h | 60 #define OPEN_FIXED_SECTION(sname, start, end) \
61 sname##_start = (start); \
63 sname##_len = (end) - (start); \
76 #define OPEN_TEXT_SECTION(start) \
80 text_start = (start) + 0x100; \
85 #define OPEN_TEXT_SECTION(start) \
86 text_start = (start); \
92 #define ZERO_FIXED_SECTION(sname, start, end) \
93 sname##_start = (start); \
95 sname##_len = (end) - (start); \
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| /arch/c6x/platforms/ |
| D | cache.c | 129 static void cache_block_operation(unsigned int *start, in cache_block_operation() argument
137 - L2_CACHE_ALIGN_LOW((unsigned int) start)) >> 2; in cache_block_operation()
140 for (; wcnt; wcnt -= wc, start += wc) { in cache_block_operation()
157 imcr_set(bar_reg, L2_CACHE_ALIGN_LOW((unsigned int) start)); in cache_block_operation()
174 static void cache_block_operation_nowait(unsigned int *start, in cache_block_operation_nowait() argument
182 - L2_CACHE_ALIGN_LOW((unsigned int) start)) >> 2; in cache_block_operation_nowait()
185 for (; wcnt; wcnt -= wc, start += wc) { in cache_block_operation_nowait()
189 imcr_set(bar_reg, L2_CACHE_ALIGN_LOW((unsigned int) start)); in cache_block_operation_nowait()
322 void enable_caching(unsigned long start, unsigned long end) in enable_caching() argument
324 unsigned int mar = IMCR_MAR_BASE + ((start >> 24) << 2); in enable_caching()
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| /arch/x86/mm/ |
| D | pat_rbtree.c | 39 static int is_node_overlap(struct memtype *node, u64 start, u64 end) in is_node_overlap() argument
41 if (node->start >= end || node->end <= start) in is_node_overlap()
64 u64 start, u64 end) in RB_DECLARE_CALLBACKS_MAX()
72 if (get_subtree_max_end(node->rb_left) > start) { in RB_DECLARE_CALLBACKS_MAX()
75 } else if (is_node_overlap(data, start, end)) { in RB_DECLARE_CALLBACKS_MAX()
78 } else if (start >= data->start) { in RB_DECLARE_CALLBACKS_MAX()
94 u64 start, u64 end, int match_type) in memtype_rb_match() argument
98 match = memtype_rb_lowest_match(root, start, end); in memtype_rb_match()
99 while (match != NULL && match->start < end) { in memtype_rb_match()
103 (match->start == start) && (match->end == end)) in memtype_rb_match()
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| /arch/mips/bcm63xx/ |
| D | dev-enet.c | 48 .start = -1, /* filled at runtime */
53 .start = -1, /* filled at runtime */
58 .start = -1, /* filled at runtime */
77 .start = -1, /* filled at runtime */
82 .start = -1, /* filled at runtime */
86 .start = -1, /* filled at runtime */
90 .start = -1, /* filled at runtime */
111 .start = -1, /* filled at runtime */
116 .start = -1, /* filled at runtime */
120 .start = -1, /* filled at runtime */
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| /arch/powerpc/lib/ |
| D | pmem.c | 17 unsigned long start = (unsigned long) addr; in arch_wb_cache_pmem() local
18 flush_dcache_range(start, start + size); in arch_wb_cache_pmem()
24 unsigned long start = (unsigned long) addr; in arch_invalidate_pmem() local
25 flush_dcache_range(start, start + size); in arch_invalidate_pmem()
35 unsigned long copied, start = (unsigned long) dest; in __copy_from_user_flushcache() local
38 flush_dcache_range(start, start + size); in __copy_from_user_flushcache()
45 unsigned long start = (unsigned long) dest; in memcpy_flushcache() local
48 flush_dcache_range(start, start + size); in memcpy_flushcache()
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| D | rheap.c | 138 blk->start = 0; in get_slot()
163 s = blkn->start; in attach_free_block()
175 bs = blk->start; in attach_free_block()
193 if (before && s != (before->start + before->size)) in attach_free_block()
196 if (after && e != after->start) in attach_free_block()
221 after->start -= size; in attach_free_block()
240 if (blk->start > blkn->start) { in attach_taken_block()
329 int rh_attach_region(rh_info_t * info, unsigned long start, int size) in rh_attach_region() argument
336 s = start; in rh_attach_region()
350 start = s; in rh_attach_region()
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| /arch/c6x/include/asm/ |
| D | cache.h | 63 extern void enable_caching(unsigned long start, unsigned long end);
64 extern void disable_caching(unsigned long start, unsigned long end);
77 extern void L1P_cache_block_invalidate(unsigned int start, unsigned int end);
78 extern void L1D_cache_block_invalidate(unsigned int start, unsigned int end);
79 extern void L1D_cache_block_writeback_invalidate(unsigned int start,
81 extern void L1D_cache_block_writeback(unsigned int start, unsigned int end);
82 extern void L2_cache_block_invalidate(unsigned int start, unsigned int end);
83 extern void L2_cache_block_writeback(unsigned int start, unsigned int end);
84 extern void L2_cache_block_writeback_invalidate(unsigned int start,
86 extern void L2_cache_block_invalidate_nowait(unsigned int start,
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| /arch/microblaze/include/asm/ |
| D | cacheflush.h | 60 #define flush_icache_range(start, end) mbc->iflr(start, end); argument
62 #define invalidate_icache_range(start, end) mbc->iinr(start, end); argument
71 #define invalidate_dcache_range(start, end) mbc->dinr(start, end); argument
73 #define flush_dcache_range(start, end) mbc->dflr(start, end); argument
88 #define flush_cache_vmap(start, end) do { } while (0) argument
89 #define flush_cache_vunmap(start, end) do { } while (0) argument
97 #define flush_cache_range(vma, start, len) { \
98 flush_icache_range((unsigned) (start), (unsigned) (start) + (len)); \
99 flush_dcache_range((unsigned) (start), (unsigned) (start) + (len)); \
103 #define flush_cache_range(vma, start, len) do { } while (0) argument
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| /arch/arm/mach-pxa/ |
| D | devices.c | 41 .start = IRQ_PMU,
55 .start = 0x41100000,
60 .start = IRQ_MMC,
96 .start = 0x40600000,
101 .start = IRQ_USB,
134 .start = 0x54100000,
139 .start = IRQ_USB2,
160 .start = 0x44000000,
165 .start = IRQ_LCD,
192 .start = 0x40100000,
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| /arch/arm64/kernel/ |
| D | sys_compat.c | 23 __do_compat_cache_op(unsigned long start, unsigned long end) in __do_compat_cache_op() argument
28 unsigned long chunk = min(PAGE_SIZE, end - start); in __do_compat_cache_op()
33 ret = __flush_cache_user_range(start, start + chunk); in __do_compat_cache_op()
38 start += chunk; in __do_compat_cache_op()
39 } while (start < end); in __do_compat_cache_op()
45 do_compat_cache_op(unsigned long start, unsigned long end, int flags) in do_compat_cache_op() argument
47 if (end < start || flags) in do_compat_cache_op()
50 if (!access_ok((const void __user *)start, end - start)) in do_compat_cache_op()
53 return __do_compat_cache_op(start, end); in do_compat_cache_op()
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