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/arch/arm/boot/dts/
Dimx6sl.dtsi540 anatop-vol-bit-shift = <8>;
541 anatop-vol-bit-width = <5>;
555 anatop-vol-bit-shift = <8>;
556 anatop-vol-bit-width = <5>;
570 anatop-vol-bit-shift = <8>;
571 anatop-vol-bit-width = <5>;
585 anatop-vol-bit-shift = <0>;
586 anatop-vol-bit-width = <5>;
601 anatop-vol-bit-shift = <9>;
602 anatop-vol-bit-width = <5>;
[all …]
Dimx6qdl.dtsi703 anatop-vol-bit-shift = <8>;
704 anatop-vol-bit-width = <5>;
718 anatop-vol-bit-shift = <8>;
719 anatop-vol-bit-width = <5>;
733 anatop-vol-bit-shift = <8>;
734 anatop-vol-bit-width = <5>;
748 anatop-vol-bit-shift = <0>;
749 anatop-vol-bit-width = <5>;
765 anatop-vol-bit-shift = <9>;
766 anatop-vol-bit-width = <5>;
[all …]
Dexynos4412-itop-elite.dts65 vol-up {
71 vol-down {
Dimx6sx.dtsi631 anatop-vol-bit-shift = <8>;
632 anatop-vol-bit-width = <5>;
646 anatop-vol-bit-shift = <8>;
647 anatop-vol-bit-width = <5>;
661 anatop-vol-bit-shift = <8>;
662 anatop-vol-bit-width = <5>;
676 anatop-vol-bit-shift = <0>;
677 anatop-vol-bit-width = <5>;
692 anatop-vol-bit-shift = <9>;
693 anatop-vol-bit-width = <5>;
[all …]
Dimx6ul.dtsi592 anatop-vol-bit-shift = <8>;
593 anatop-vol-bit-width = <5>;
607 anatop-vol-bit-shift = <0>;
608 anatop-vol-bit-width = <5>;
624 anatop-vol-bit-shift = <18>;
625 anatop-vol-bit-width = <5>;
Dexynos4210-trats.dts90 vol-down-key {
97 vol-up-key {
Ds5pv210-fascinate4g.dts26 vol-down {
32 vol-up {
Dexynos4210-universal_c210.dts68 vol-up-key {
75 vol-down-key {
Ds5pv210-galaxys.dts33 vol-down {
39 vol-up {
Dimx7s.dtsi565 anatop-vol-bit-shift = <8>;
566 anatop-vol-bit-width = <5>;
579 anatop-vol-bit-shift = <8>;
580 anatop-vol-bit-width = <5>;
Dexynos4210-i9100.dts91 vol-down {
98 vol-up {
Dimx6sll.dtsi520 anatop-vol-bit-shift = <8>;
521 anatop-vol-bit-width = <5>;
/arch/arm64/boot/dts/rockchip/
Drk3308-evb.dts58 vol-down-key {
64 vol-up-key {
Dpx30-evb.dts45 vol-down-key {
51 vol-up-key {
/arch/arc/mm/
Dcache.c102 } vol; in read_decode_cache_bcr_arcv2() local
134 READ_BCR(AUX_VOL, vol); in read_decode_cache_bcr_arcv2()
135 perip_base = vol.start << 28; in read_decode_cache_bcr_arcv2()
138 perip_end = (vol.limit << 28) - 1; in read_decode_cache_bcr_arcv2()
/arch/arm64/boot/dts/arm/
Djuno-motherboard.dtsi71 vol-up-button {
78 vol-down-button {
/arch/mips/include/asm/
Dmipsregs.h1424 #define ___read_32bit_c0_register(source, sel, vol) \ argument
1427 __asm__ vol( \
1431 __asm__ vol( \
1440 #define ___read_64bit_c0_register(source, sel, vol) \ argument
1443 __res = __read_64bit_c0_split(source, sel, vol); \
1445 __asm__ vol( \
1452 __asm__ vol( \
1548 #define __read_64bit_c0_split(source, sel, vol) \ argument
1555 __asm__ vol( \
1564 __asm__ vol( \
/arch/arm64/boot/dts/qcom/
Dsdm845-xiaomi-beryllium.dts46 vol-up {
224 vol_up_pin_a: vol-up-active {
Dsdm845-db845c.dts45 vol-up {
585 vol_up_pin_a: vol-up-active {
/arch/arm64/boot/dts/sprd/
Dsc2731.dtsi103 io-channel-names = "bat-temp", "charge-vol";
/arch/arm64/boot/dts/freescale/
Dimx8mn-evk.dtsi136 samsung,picophy-dc-vol-level-adjust = <7>;
Dimx8mq-librem5.dtsi39 vol-down {
45 vol-up {
Dimx8mm-evk.dtsi310 samsung,picophy-dc-vol-level-adjust = <7>;
/arch/m68k/ifpsp060/src/
Dilsp.S270 # Art of Computer Programming, vol II, Seminumerical Algorithms. #