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/arch/powerpc/boot/dts/fsl/
Dmpc8548cds.dtsi74 reg = <0x1 0x0 0x1000>;
115 reg = <0x1>;
172 0x2000 0x0 0x0 0x1 &mpic 0x0 0x1 0 0
173 0x2000 0x0 0x0 0x2 &mpic 0x1 0x1 0 0
174 0x2000 0x0 0x0 0x3 &mpic 0x2 0x1 0 0
175 0x2000 0x0 0x0 0x4 &mpic 0x3 0x1 0 0
178 0x2800 0x0 0x0 0x1 &mpic 0x1 0x1 0 0
179 0x2800 0x0 0x0 0x2 &mpic 0x2 0x1 0 0
180 0x2800 0x0 0x0 0x3 &mpic 0x3 0x1 0 0
181 0x2800 0x0 0x0 0x4 &mpic 0x0 0x1 0 0
[all …]
Dmpc8572ds.dtsi161 reg = <0x1>;
250 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
251 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
252 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
253 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
256 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
257 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
258 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
259 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
262 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
[all …]
Dmpc8540ads.dts168 reg = <0x1>;
272 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
273 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
274 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
275 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
278 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
279 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
280 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
281 0x1800 0x0 0x0 0x4 &mpic 0x3 0x1
284 0x2000 0x0 0x0 0x1 &mpic 0x3 0x1
[all …]
Dmpc8560ads.dts157 reg = <0x1>;
277 reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
289 reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
311 0x1000 0x0 0x0 0x1 &mpic 0x1 0x1
312 0x1000 0x0 0x0 0x2 &mpic 0x2 0x1
313 0x1000 0x0 0x0 0x3 &mpic 0x3 0x1
314 0x1000 0x0 0x0 0x4 &mpic 0x4 0x1
317 0x1800 0x0 0x0 0x1 &mpic 0x4 0x1
318 0x1800 0x0 0x0 0x2 &mpic 0x1 0x1
319 0x1800 0x0 0x0 0x3 &mpic 0x2 0x1
[all …]
Dmpc8569mds.dts33 0x1 0x0 0x0 0xf8000000 0x00008000
80 reg = <0x11 0x1>;
143 0x2 0x1f 0x1 0x0 0x1 0x0 /* QE_MUX_MDC */
145 0x2 0x0b 0x2 0x0 0x1 0x0 /* CLK12*/
146 0x0 0x0 0x1 0x0 0x3 0x0 /* ENET1_TXD0_SER1_TXD0 */
147 0x0 0x1 0x1 0x0 0x3 0x0 /* ENET1_TXD1_SER1_TXD1 */
148 0x0 0x2 0x1 0x0 0x1 0x0 /* ENET1_TXD2_SER1_TXD2 */
149 0x0 0x3 0x1 0x0 0x2 0x0 /* ENET1_TXD3_SER1_TXD3 */
151 0x0 0x7 0x2 0x0 0x1 0x0 /* ENET1_RXD1_SER1_RXD1 */
154 0x0 0x4 0x1 0x0 0x2 0x0 /* ENET1_TX_EN_SER1_RTS_B */
[all …]
Dmpc8555cds.dts168 reg = <0x1>;
287 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
288 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
289 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
290 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
293 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
294 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
295 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
296 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
299 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
[all …]
Dmpc8541cds.dts168 reg = <0x1>;
287 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
288 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
289 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
290 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
293 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
294 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
295 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
296 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
299 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
[all …]
Dmpc8568mds.dts28 0x1 0x0 0xf8000000 0x00008000
52 reg = <0x5 0x1>;
93 reg = <0x1>;
128 0x4 0xa 0x1 0x0 0x2 0x0 /* TxD0 */
129 0x4 0x9 0x1 0x0 0x2 0x0 /* TxD1 */
130 0x4 0x8 0x1 0x0 0x2 0x0 /* TxD2 */
131 0x4 0x7 0x1 0x0 0x2 0x0 /* TxD3 */
132 0x4 0x17 0x1 0x0 0x2 0x0 /* TxD4 */
133 0x4 0x16 0x1 0x0 0x2 0x0 /* TxD5 */
134 0x4 0x15 0x1 0x0 0x2 0x0 /* TxD6 */
[all …]
/arch/arm64/lib/
Dcopy_page.S23 prfm pldl1strm, [x1, #128]
24 prfm pldl1strm, [x1, #256]
25 prfm pldl1strm, [x1, #384]
28 ldp x2, x3, [x1]
29 ldp x4, x5, [x1, #16]
30 ldp x6, x7, [x1, #32]
31 ldp x8, x9, [x1, #48]
32 ldp x10, x11, [x1, #64]
33 ldp x12, x13, [x1, #80]
34 ldp x14, x15, [x1, #96]
[all …]
Dclear_user.S23 mov x2, x1 // save the size for fixup return
24 subs x1, x1, #8
28 subs x1, x1, #8
30 2: adds x1, x1, #4
33 sub x1, x1, #4
34 3: adds x1, x1, #2
37 sub x1, x1, #2
38 4: adds x1, x1, #1
Dtishift.S16 lsl x1, x1, x2
19 orr x1, x1, x3
26 lsl x1, x0, x1
39 lsl x3, x1, x3
40 asr x2, x1, x2
42 mov x1, x2
47 asr x2, x1, #63
48 asr x0, x1, x0
49 mov x1, x2
61 lsl x3, x1, x3
[all …]
Dmte.S31 multitag_transfer_size x1, x2
33 add x0, x0, x1
47 mrs x1, dczid_el0
48 tbnz x1, #4, 2f // Branch if DC GZVA is prohibited
51 lsl x1, x2, x1
54 add x0, x0, x1
72 mov x3, x1
93 mov x3, x1
96 uao_user_alternative 2f, ldrb, ldtrb, w4, x1, 0
99 add x1, x1, #1
[all …]
/arch/x86/crypto/
Dserpent-avx2-asm_64.S61 #define S0_1(x0, x1, x2, x3, x4) \ argument
66 vpxor x1, tp, x3; \
67 vpand x0, x1, x1; \
68 vpxor x4, x1, x1; \
70 #define S0_2(x0, x1, x2, x3, x4) \ argument
74 vpand x1, x2, x2; \
76 vpxor RNOT, x1, x1; \
78 vpxor x2, x1, x1;
80 #define S1_1(x0, x1, x2, x3, x4) \ argument
81 vpxor x0, x1, tp; \
[all …]
Dserpent-avx-x86_64-asm_64.S55 #define S0_1(x0, x1, x2, x3, x4) \ argument
60 vpxor x1, tp, x3; \
61 vpand x0, x1, x1; \
62 vpxor x4, x1, x1; \
64 #define S0_2(x0, x1, x2, x3, x4) \ argument
68 vpand x1, x2, x2; \
70 vpxor RNOT, x1, x1; \
72 vpxor x2, x1, x1;
74 #define S1_1(x0, x1, x2, x3, x4) \ argument
75 vpxor x0, x1, tp; \
[all …]
Dserpent-sse2-x86_64-asm_64.S41 #define S0_1(x0, x1, x2, x3, x4) \ argument
47 pxor x1, x3; \
48 pand x0, x1; \
49 pxor x4, x1; \
51 #define S0_2(x0, x1, x2, x3, x4) \ argument
55 pand x1, x2; \
57 pxor RNOT, x1; \
59 pxor x2, x1;
61 #define S1_1(x0, x1, x2, x3, x4) \ argument
62 movdqa x1, x4; \
[all …]
Dserpent-sse2-i586-asm_32.S42 #define K(x0, x1, x2, x3, x4, i) \ argument
47 pxor RT0, x1; \
52 #define LK(x0, x1, x2, x3, x4, i) \ argument
57 pxor x0, x1; \
62 pxor x2, x1; \
63 movdqa x1, x4; \
64 pslld $1, x1; \
66 por x4, x1; \
75 movdqa x1, x4; \
77 pxor x1, x0; \
[all …]
/arch/arm64/kvm/hyp/
Dentry.S28 adr_this_cpu x1, kvm_hyp_ctxt, x2
31 save_callee_saved_regs x1
34 save_sp_el0 x1, x2
44 mrs x1, isr_el1
45 cbz x1, 1f
50 set_loaded_vcpu x0, x1, x2
59 ptrauth_switch_to_guest x29, x0, x1, x2
65 ldp x0, x1, [x29, #CPU_XREG_OFFSET(0)]
87 get_loaded_vcpu x0, x1
98 adr_this_cpu x0, kvm_hyp_ctxt, x1
[all …]
/arch/arm64/boot/dts/broadcom/stingray/
Dstingray-fs4.dtsi57 mboxes = <&raid_mbox 0 0x1 0xff00>,
58 <&raid_mbox 1 0x1 0xff00>,
59 <&raid_mbox 2 0x1 0xff00>,
60 <&raid_mbox 3 0x1 0xff00>;
65 mboxes = <&raid_mbox 4 0x1 0xff00>,
66 <&raid_mbox 5 0x1 0xff00>,
67 <&raid_mbox 6 0x1 0xff00>,
68 <&raid_mbox 7 0x1 0xff00>;
73 mboxes = <&raid_mbox 8 0x1 0xff00>,
74 <&raid_mbox 9 0x1 0xff00>,
[all …]
/arch/arm64/kvm/hyp/nvhe/
Dhyp-init.S67 1: mov x0, x1
86 ldr x1, [x0, #NVHE_INIT_TPIDR_EL2]
87 msr tpidr_el2, x1
89 ldr x1, [x0, #NVHE_INIT_STACK_HYP_VA]
90 mov sp, x1
92 ldr x1, [x0, #NVHE_INIT_MAIR_EL2]
93 msr mair_el2, x1
95 ldr x1, [x0, #NVHE_INIT_HCR_EL2]
96 msr hcr_el2, x1
98 ldr x1, [x0, #NVHE_INIT_VTTBR]
[all …]
/arch/arm64/kernel/
Dhyp-stub.S51 msr vbar_el2, x1
61 mov x4, x1
62 mov x1, x3
79 mrs x1, sctlr_el2
80 tbnz x1, #0, 1f
83 mrs x1, id_aa64mmfr1_el1
84 ubfx x1, x1, #ID_AA64MMFR1_VHE_SHIFT, #4
85 cbz x1, 1f
88 adr_l x1, id_aa64mmfr1_override
89 ldr x2, [x1, FTR_OVR_VAL_OFFSET]
[all …]
/arch/powerpc/boot/dts/
Dstxssa8555.dts286 0x8000 0x0 0x0 0x1 &mpic 0x0 0x1
287 0x8000 0x0 0x0 0x2 &mpic 0x1 0x1
288 0x8000 0x0 0x0 0x3 &mpic 0x2 0x1
289 0x8000 0x0 0x0 0x4 &mpic 0x3 0x1
292 0x8800 0x0 0x0 0x1 &mpic 0x0 0x1
293 0x8800 0x0 0x0 0x2 &mpic 0x1 0x1
294 0x8800 0x0 0x0 0x3 &mpic 0x2 0x1
295 0x8800 0x0 0x0 0x4 &mpic 0x3 0x1
298 0x9000 0x0 0x0 0x1 &mpic 0x0 0x1
299 0x9000 0x0 0x0 0x2 &mpic 0x1 0x1
[all …]
Dmvme5100.dts112 0x5800 0x0 0x0 0x1 &mpic 0x0 0x2
120 0x6800 0x0 0x0 0x1 &mpic 0x5 0x1
121 0x6800 0x0 0x0 0x2 &mpic 0x6 0x1
122 0x6800 0x0 0x0 0x3 &mpic 0x7 0x1
123 0x6800 0x0 0x0 0x4 &mpic 0x8 0x1
126 0x7000 0x0 0x0 0x1 &mpic 0x2 0x1
131 0x8000 0x0 0x0 0x1 &mpic 0x9 0x1
132 0x8000 0x0 0x0 0x2 &mpic 0xa 0x1
133 0x8000 0x0 0x0 0x3 &mpic 0xb 0x1
134 0x8000 0x0 0x0 0x4 &mpic 0xc 0x1
[all …]
/arch/arm64/mm/
Dcache.S52 cmp x4, x1
61 invalidate_icache_by_line x0, x1, x2, x3, 9f
64 uaccess_ttbr0_disable x1, x2
89 invalidate_icache_by_line x0, x1, x2, x3, 2f
92 uaccess_ttbr0_disable x1, x2
109 dcache_by_line_op civac, sy, x0, x1, x2, x3
127 dcache_by_line_op cvau, ish, x0, x1, x2, x3
150 add x1, x1, x0
153 tst x1, x3 // end cache line aligned?
154 bic x1, x1, x3
[all …]
/arch/arm/boot/dts/
Dimx25-eukrea-mbimxsd25-baseboard.dts102 MX25_PAD_LD0__LD0 0x1
103 MX25_PAD_LD1__LD1 0x1
104 MX25_PAD_LD2__LD2 0x1
105 MX25_PAD_LD3__LD3 0x1
106 MX25_PAD_LD4__LD4 0x1
107 MX25_PAD_LD5__LD5 0x1
108 MX25_PAD_LD6__LD6 0x1
109 MX25_PAD_LD7__LD7 0x1
110 MX25_PAD_LD8__LD8 0x1
111 MX25_PAD_LD9__LD9 0x1
[all …]
/arch/microblaze/boot/dts/
Dsystem.dts36 #cpus = <0x1>;
54 xlnx,allow-dcache-wr = <0x1>;
55 xlnx,allow-icache-wr = <0x1>;
58 xlnx,d-lmb = <0x1>;
60 xlnx,d-plb = <0x1>;
63 xlnx,dcache-always-used = <0x1>;
66 xlnx,dcache-use-fsl = <0x1>;
67 xlnx,debug-enabled = <0x1>;
68 xlnx,div-zero-exception = <0x1>;
70 xlnx,dynamic-bus-sizing = <0x1>;
[all …]

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