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Searched refs:sync (Results 1 – 25 of 350) sorted by relevance

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/drivers/gpu/drm/i915/selftests/
Di915_syncmap.c101 static int check_syncmap_free(struct i915_syncmap **sync) in check_syncmap_free() argument
103 i915_syncmap_free(sync); in check_syncmap_free()
104 if (*sync) { in check_syncmap_free()
112 static int dump_syncmap(struct i915_syncmap *sync, int err) in dump_syncmap() argument
117 return check_syncmap_free(&sync); in dump_syncmap()
123 if (i915_syncmap_print_to_buf(sync, buf, PAGE_SIZE)) in dump_syncmap()
129 i915_syncmap_free(&sync); in dump_syncmap()
135 struct i915_syncmap *sync = (void *)~0ul; in igt_syncmap_init() local
142 i915_syncmap_init(&sync); in igt_syncmap_init()
143 return check_syncmap_free(&sync); in igt_syncmap_init()
[all …]
/drivers/clk/tegra/
Dclk-audio-sync.c15 struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); in clk_sync_source_recalc_rate() local
17 return sync->rate; in clk_sync_source_recalc_rate()
23 struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); in clk_sync_source_round_rate() local
25 if (rate > sync->max_rate) in clk_sync_source_round_rate()
34 struct tegra_clk_sync_source *sync = to_clk_sync_source(hw); in clk_sync_source_set_rate() local
36 sync->rate = rate; in clk_sync_source_set_rate()
49 struct tegra_clk_sync_source *sync; in tegra_clk_register_sync_source() local
53 sync = kzalloc(sizeof(*sync), GFP_KERNEL); in tegra_clk_register_sync_source()
54 if (!sync) { in tegra_clk_register_sync_source()
59 sync->max_rate = max_rate; in tegra_clk_register_sync_source()
[all …]
/drivers/gpu/drm/amd/amdgpu/
Damdgpu_sync.c49 void amdgpu_sync_create(struct amdgpu_sync *sync) in amdgpu_sync_create() argument
51 hash_init(sync->fences); in amdgpu_sync_create()
52 sync->last_vm_update = NULL; in amdgpu_sync_create()
131 static bool amdgpu_sync_add_later(struct amdgpu_sync *sync, struct dma_fence *f) in amdgpu_sync_add_later() argument
135 hash_for_each_possible(sync->fences, e, node, f->context) { in amdgpu_sync_add_later()
153 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f) in amdgpu_sync_fence() argument
160 if (amdgpu_sync_add_later(sync, f)) in amdgpu_sync_fence()
167 hash_add(sync->fences, &e->node, f->context); in amdgpu_sync_fence()
181 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence) in amdgpu_sync_vm_fence() argument
186 amdgpu_sync_keep_later(&sync->last_vm_update, fence); in amdgpu_sync_vm_fence()
[all …]
Damdgpu_sync.h49 void amdgpu_sync_create(struct amdgpu_sync *sync);
50 int amdgpu_sync_fence(struct amdgpu_sync *sync, struct dma_fence *f);
51 int amdgpu_sync_vm_fence(struct amdgpu_sync *sync, struct dma_fence *fence);
52 int amdgpu_sync_resv(struct amdgpu_device *adev, struct amdgpu_sync *sync,
55 struct dma_fence *amdgpu_sync_peek_fence(struct amdgpu_sync *sync,
57 struct dma_fence *amdgpu_sync_get_fence(struct amdgpu_sync *sync);
59 int amdgpu_sync_wait(struct amdgpu_sync *sync, bool intr);
60 void amdgpu_sync_free(struct amdgpu_sync *sync);
Damdgpu_ids.c198 struct amdgpu_sync *sync, in amdgpu_vmid_grab_idle() argument
209 return amdgpu_sync_fence(sync, ring->vmid_wait); in amdgpu_vmid_grab_idle()
248 r = amdgpu_sync_fence(sync, &array->base); in amdgpu_vmid_grab_idle()
271 struct amdgpu_sync *sync, in amdgpu_vmid_grab_reserved() argument
279 struct dma_fence *updates = sync->last_vm_update; in amdgpu_vmid_grab_reserved()
305 r = amdgpu_sync_fence(sync, tmp); in amdgpu_vmid_grab_reserved()
340 struct amdgpu_sync *sync, in amdgpu_vmid_grab_used() argument
349 struct dma_fence *updates = sync->last_vm_update; in amdgpu_vmid_grab_used()
410 struct amdgpu_sync *sync, struct dma_fence *fence, in amdgpu_vmid_grab() argument
421 r = amdgpu_vmid_grab_idle(vm, ring, sync, &idle); in amdgpu_vmid_grab()
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Damdgpu_amdkfd_gpuvm.c377 static int vm_update_pds(struct amdgpu_vm *vm, struct amdgpu_sync *sync) in vm_update_pds() argument
387 return amdgpu_sync_fence(sync, vm->last_update); in vm_update_pds()
607 struct amdgpu_sync *sync; /* Pointer to sync object */ member
634 ctx->sync = &mem->sync; in reserve_bo_and_vm()
685 ctx->sync = &mem->sync; in reserve_bo_and_cond_vms()
752 ret = amdgpu_sync_wait(ctx->sync, intr); in unreserve_bo_and_vms()
758 ctx->sync = NULL; in unreserve_bo_and_vms()
768 struct amdgpu_sync *sync) in unmap_bo_from_gpuvm() argument
777 amdgpu_sync_fence(sync, bo_va->last_pt_update); in unmap_bo_from_gpuvm()
784 struct amdgpu_sync *sync) in update_gpuvm_pte() argument
[all …]
Damdgpu_job.c86 amdgpu_sync_create(&(*job)->sync); in amdgpu_job_alloc()
131 amdgpu_sync_free(&job->sync); in amdgpu_job_free_cb()
141 amdgpu_sync_free(&job->sync); in amdgpu_job_free()
189 fence = amdgpu_sync_get_fence(&job->sync); in amdgpu_job_dependency()
197 r = amdgpu_vmid_grab(vm, ring, &job->sync, in amdgpu_job_dependency()
203 fence = amdgpu_sync_get_fence(&job->sync); in amdgpu_job_dependency()
219 BUG_ON(amdgpu_sync_peek_fence(&job->sync, NULL)); in amdgpu_job_run()
/drivers/gpu/drm/radeon/
Dradeon_sync.c41 void radeon_sync_create(struct radeon_sync *sync) in radeon_sync_create() argument
46 sync->semaphores[i] = NULL; in radeon_sync_create()
49 sync->sync_to[i] = NULL; in radeon_sync_create()
51 sync->last_vm_update = NULL; in radeon_sync_create()
62 void radeon_sync_fence(struct radeon_sync *sync, in radeon_sync_fence() argument
70 other = sync->sync_to[fence->ring]; in radeon_sync_fence()
71 sync->sync_to[fence->ring] = radeon_fence_later(fence, other); in radeon_sync_fence()
74 other = sync->last_vm_update; in radeon_sync_fence()
75 sync->last_vm_update = radeon_fence_later(fence, other); in radeon_sync_fence()
89 struct radeon_sync *sync, in radeon_sync_resv() argument
[all …]
Drv770_dma.c48 struct radeon_sync sync; in rv770_copy_dma() local
55 radeon_sync_create(&sync); in rv770_copy_dma()
62 radeon_sync_free(rdev, &sync, NULL); in rv770_copy_dma()
66 radeon_sync_resv(rdev, &sync, resv, false); in rv770_copy_dma()
67 radeon_sync_rings(rdev, &sync, ring->idx); in rv770_copy_dma()
86 radeon_sync_free(rdev, &sync, NULL); in rv770_copy_dma()
91 radeon_sync_free(rdev, &sync, fence); in rv770_copy_dma()
Devergreen_dma.c114 struct radeon_sync sync; in evergreen_copy_dma() local
121 radeon_sync_create(&sync); in evergreen_copy_dma()
128 radeon_sync_free(rdev, &sync, NULL); in evergreen_copy_dma()
132 radeon_sync_resv(rdev, &sync, resv, false); in evergreen_copy_dma()
133 radeon_sync_rings(rdev, &sync, ring->idx); in evergreen_copy_dma()
152 radeon_sync_free(rdev, &sync, NULL); in evergreen_copy_dma()
157 radeon_sync_free(rdev, &sync, fence); in evergreen_copy_dma()
Dsi_dma.c237 struct radeon_sync sync; in si_copy_dma() local
244 radeon_sync_create(&sync); in si_copy_dma()
251 radeon_sync_free(rdev, &sync, NULL); in si_copy_dma()
255 radeon_sync_resv(rdev, &sync, resv, false); in si_copy_dma()
256 radeon_sync_rings(rdev, &sync, ring->idx); in si_copy_dma()
275 radeon_sync_free(rdev, &sync, NULL); in si_copy_dma()
280 radeon_sync_free(rdev, &sync, fence); in si_copy_dma()
Dradeon_ib.c70 radeon_sync_create(&ib->sync); in radeon_ib_get()
99 radeon_sync_free(rdev, &ib->sync, ib->fence); in radeon_ib_free()
148 radeon_sync_fence(&ib->sync, vm_id_fence); in radeon_ib_schedule()
152 r = radeon_sync_rings(rdev, &ib->sync, ib->ring); in radeon_ib_schedule()
161 ib->sync.last_vm_update); in radeon_ib_schedule()
165 radeon_sync_free(rdev, &const_ib->sync, NULL); in radeon_ib_schedule()
/drivers/lightnvm/
Dpblk-rb.c95 rb->mem = rb->subm = rb->sync = rb->l2p_update = 0; in pblk_rb_init()
195 unsigned int sync = READ_ONCE(rb->sync); in pblk_rb_space() local
197 return pblk_rb_ring_space(rb, mem, sync, rb->nr_entries); in pblk_rb_space()
221 unsigned int sync = READ_ONCE(rb->sync); in pblk_rb_sync_count() local
223 return pblk_rb_ring_count(mem, sync, rb->nr_entries); in pblk_rb_sync_count()
280 unsigned int mem, unsigned int sync) in pblk_rb_update_l2p() argument
307 unsigned int sync; in pblk_rb_sync_l2p() local
313 sync = smp_load_acquire(&rb->sync); in pblk_rb_sync_l2p()
315 to_update = pblk_rb_ring_count(sync, rb->l2p_update, rb->nr_entries); in pblk_rb_sync_l2p()
390 unsigned int sync, flush_point; in pblk_rb_flush_point_set() local
[all …]
/drivers/gpu/drm/sti/
Dsti_vtg.c185 static void vtg_set_hsync_vsync_pos(struct sti_vtg_sync_params *sync, in vtg_set_hsync_vsync_pos() argument
212 sync->hsync = (stop << 16) | start; in vtg_set_hsync_vsync_pos()
230 sync->vsync_line_top = (fallsync_top << 16) | risesync_top; in vtg_set_hsync_vsync_pos()
231 sync->vsync_off_top = (fallsync_offs_top << 16) | risesync_offs_top; in vtg_set_hsync_vsync_pos()
234 sync->vsync_line_bot = sync->vsync_line_top; in vtg_set_hsync_vsync_pos()
235 sync->vsync_off_bot = sync->vsync_off_top; in vtg_set_hsync_vsync_pos()
240 struct sti_vtg_sync_params *sync, in vtg_set_mode() argument
255 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDMI - 1], HDMI_DELAY, mode); in vtg_set_mode()
258 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDDCS - 1], 0, mode); in vtg_set_mode()
261 vtg_set_hsync_vsync_pos(&sync[VTG_SYNC_ID_HDF - 1], AWG_DELAY_HD, mode); in vtg_set_mode()
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/drivers/iio/imu/
Dadis16475.c83 const struct adis16475_sync *sync; member
604 .sync = adis16475_sync_mode,
619 .sync = adis16475_sync_mode,
634 .sync = adis16475_sync_mode,
649 .sync = adis16475_sync_mode,
664 .sync = adis16475_sync_mode,
679 .sync = adis16475_sync_mode,
694 .sync = adis16475_sync_mode,
709 .sync = adis16475_sync_mode,
724 .sync = adis16475_sync_mode,
[all …]
/drivers/gpu/drm/nouveau/dispnv50/
Ddac507d.c33 u32 sync = 0; in dac507d_ctrl() local
37 sync |= NVVAL(NV507D, DAC_SET_POLARITY, HSYNC, asyh->or.nhsync); in dac507d_ctrl()
38 sync |= NVVAL(NV507D, DAC_SET_POLARITY, VSYNC, asyh->or.nvsync); in dac507d_ctrl()
45 DAC_SET_POLARITY(or), sync); in dac507d_ctrl()
/drivers/media/dvb-frontends/
Dves1820.c233 int sync; in ves1820_read_status() local
236 sync = ves1820_readreg(state, 0x11); in ves1820_read_status()
238 if (sync & 1) in ves1820_read_status()
241 if (sync & 2) in ves1820_read_status()
244 if (sync & 2) /* XXX FIXME! */ in ves1820_read_status()
247 if (sync & 4) in ves1820_read_status()
250 if (sync & 8) in ves1820_read_status()
307 int sync; in ves1820_get_frontend() local
310 sync = ves1820_readreg(state, 0x11); in ves1820_get_frontend()
314 printk(sync & 2 ? "ves1820: AFC (%d) %dHz\n" : in ves1820_get_frontend()
[all …]
Dves1x93.c294 u8 sync = ves1x93_readreg (state, 0x0e); in ves1x93_read_status() local
306 while ((sync & 0x03) != 0x03 && (sync & 0x0c) && maxtry--) { in ves1x93_read_status()
308 sync = ves1x93_readreg (state, 0x0e); in ves1x93_read_status()
313 if (sync & 1) in ves1x93_read_status()
316 if (sync & 2) in ves1x93_read_status()
319 if (sync & 4) in ves1x93_read_status()
322 if (sync & 8) in ves1x93_read_status()
325 if ((sync & 0x1f) == 0x1f) in ves1x93_read_status()
/drivers/md/
Ddm-log.c234 enum sync { enum
238 } sync; member
327 if (log->sync != DEFAULTSYNC || log->header.magic != MIRROR_MAGIC) { in read_header()
367 enum sync sync = DEFAULTSYNC; in create_log_context() local
383 sync = FORCESYNC; in create_log_context()
385 sync = NOSYNC; in create_log_context()
413 lc->sync = sync; in create_log_context()
494 memset(lc->sync_bits, (sync == NOSYNC) ? -1 : 0, bitset_size); in create_log_context()
495 lc->sync_count = (sync == NOSYNC) ? region_count : 0; in create_log_context()
608 if (lc->sync == NOSYNC) in disk_resume()
[all …]
/drivers/gpu/drm/mediatek/
Dmtk_dpi.c142 struct mtk_dpi_sync_param *sync) in mtk_dpi_config_hsync() argument
145 sync->sync_width << HPW, HPW_MASK); in mtk_dpi_config_hsync()
147 sync->back_porch << HBP, HBP_MASK); in mtk_dpi_config_hsync()
148 mtk_dpi_mask(dpi, DPI_TGEN_HPORCH, sync->front_porch << HFP, in mtk_dpi_config_hsync()
153 struct mtk_dpi_sync_param *sync, in mtk_dpi_config_vsync() argument
157 sync->sync_width << VSYNC_WIDTH_SHIFT, in mtk_dpi_config_vsync()
160 sync->shift_half_line << VSYNC_HALF_LINE_SHIFT, in mtk_dpi_config_vsync()
163 sync->back_porch << VSYNC_BACK_PORCH_SHIFT, in mtk_dpi_config_vsync()
166 sync->front_porch << VSYNC_FRONT_PORCH_SHIFT, in mtk_dpi_config_vsync()
171 struct mtk_dpi_sync_param *sync) in mtk_dpi_config_vsync_lodd() argument
[all …]
/drivers/staging/pi433/Documentation/
Dpi433.txt125 optionOn - a sync word will be automatically added to
127 optionOff - no sync word will be added
128 Attention: While possible to generate sync without preamble, the
129 receiver won't be able to detect the sync without preamble.
136 Attention: should be used in combination with sync, only
143 Attention: should be used in combination with sync, only
152 length of the sync word. Allowed values: 0...8
158 contains up to eight values, that are used as the sync pattern
159 on sync option
224 optionOn - sync detection is enabled. If configured sync pattern
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/drivers/gpu/ipu-v3/
Dipu-dc.c120 int map, int wave, int glue, int sync, int stop) in dc_write_tmpl() argument
129 reg1 = sync | glue << 4 | ++wave << 11 | ((operand << 15) & 0xffff8000); in dc_write_tmpl()
132 reg1 = sync | glue << 4 | ++wave << 11 | ++map << 15 | ((operand << 20) & 0xfff00000); in dc_write_tmpl()
164 int addr, sync; in ipu_dc_init_sync() local
178 sync = interlaced ? 6 : 5; in ipu_dc_init_sync()
192 dc_write_tmpl(dc, addr, WROD(0), 0, map, SYNC_WAVE, 0, sync, 1); in ipu_dc_init_sync()
199 dc_write_tmpl(dc, addr + 2, WROD(0), 0, map, SYNC_WAVE, 8, sync, 1); in ipu_dc_init_sync()
200 dc_write_tmpl(dc, addr + 3, WROD(0), 0, map, SYNC_WAVE, 4, sync, 0); in ipu_dc_init_sync()
202 dc_write_tmpl(dc, addr + 1, WROD(0), 0, map, SYNC_WAVE, 0, sync, 1); in ipu_dc_init_sync()
/drivers/media/test-drivers/vidtv/
Dvidtv_s302m.c184 if (e->sync && e->sync->is_video_encoder) { in vidtv_s302m_alloc_au()
185 sync_au = e->sync->access_units; in vidtv_s302m_alloc_au()
204 struct vidtv_access_unit *sync_au = e->sync->access_units; in vidtv_s302m_compute_sample_count_from_video()
210 vau_duration_usecs = USEC_PER_SEC / e->sync->sampling_rate_hz; in vidtv_s302m_compute_sample_count_from_video()
224 struct vidtv_access_unit *sync_au = e->sync->access_units; in vidtv_s302m_compute_pts_from_video()
410 if (e->sync && e->sync->is_video_encoder) { in vidtv_s302m_encode()
485 e->sync = args.sync; in vidtv_s302m_encoder_init()
/drivers/net/ethernet/qualcomm/
Dqca_spi.c507 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
515 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
518 qca->sync = QCASPI_SYNC_READY; in qcaspi_qca7k_sync()
524 switch (qca->sync) { in qcaspi_qca7k_sync()
529 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
549 qca->sync = QCASPI_SYNC_RESET; in qcaspi_qca7k_sync()
559 qca->sync = QCASPI_SYNC_UNKNOWN; in qcaspi_qca7k_sync()
581 if (qca->sync == QCASPI_SYNC_READY) { in qcaspi_spi_thread()
600 if (qca->sync != QCASPI_SYNC_READY) { in qcaspi_spi_thread()
602 (unsigned int)qca->sync); in qcaspi_spi_thread()
[all …]
/drivers/net/ethernet/sfc/falcon/
Dmdio_10g.h43 bool sync; in ef4_mdio_phyxgxs_lane_sync() local
49 sync = !!(lane_status & MDIO_PHYXS_LNSTAT_ALIGN); in ef4_mdio_phyxgxs_lane_sync()
50 if (!sync) in ef4_mdio_phyxgxs_lane_sync()
53 return sync; in ef4_mdio_phyxgxs_lane_sync()

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