/drivers/gpu/drm/amd/amdgpu/ |
D | amdgpu_gmc.c | 48 u64 vram_size = adev->gmc.xgmi.node_segment_size * adev->gmc.xgmi.num_physical_nodes; in amdgpu_gmc_pdb0_alloc() 49 uint32_t pde0_page_shift = adev->gmc.vmid0_page_table_block_size + 21; in amdgpu_gmc_pdb0_alloc() 62 r = amdgpu_bo_create(adev, &bp, &adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc() 66 r = amdgpu_bo_reserve(adev->gmc.pdb0_bo, false); in amdgpu_gmc_pdb0_alloc() 70 r = amdgpu_bo_pin(adev->gmc.pdb0_bo, AMDGPU_GEM_DOMAIN_VRAM); in amdgpu_gmc_pdb0_alloc() 73 r = amdgpu_bo_kmap(adev->gmc.pdb0_bo, &adev->gmc.ptr_pdb0); in amdgpu_gmc_pdb0_alloc() 77 amdgpu_bo_unreserve(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc() 81 amdgpu_bo_unpin(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc() 83 amdgpu_bo_unreserve(adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc() 85 amdgpu_bo_unref(&adev->gmc.pdb0_bo); in amdgpu_gmc_pdb0_alloc() [all …]
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D | gmc_v9_0.c | 661 adev->gmc.vm_fault.num_types = 1; in gmc_v9_0_set_irq_funcs() 662 adev->gmc.vm_fault.funcs = &gmc_v9_0_irq_funcs; in gmc_v9_0_set_irq_funcs() 665 !adev->gmc.xgmi.connected_to_cpu) { in gmc_v9_0_set_irq_funcs() 666 adev->gmc.ecc_irq.num_types = 1; in gmc_v9_0_set_irq_funcs() 667 adev->gmc.ecc_irq.funcs = &gmc_v9_0_ecc_funcs; in gmc_v9_0_set_irq_funcs() 750 if (adev->gmc.xgmi.num_physical_nodes && in gmc_v9_0_flush_gpu_tlb() 780 spin_lock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb() 839 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v9_0_flush_gpu_tlb() 880 bool vega20_xgmi_wa = (adev->gmc.xgmi.num_physical_nodes && in gmc_v9_0_flush_gpu_tlb_pasid() 1064 if (!adev->gmc.translate_further) in gmc_v9_0_get_vm_pde() [all …]
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D | amdgpu_xgmi.c | 250 return sysfs_emit(buf, "%llu\n", adev->gmc.xgmi.node_id); in amdgpu_xgmi_show_device_id() 360 if (!adev->gmc.xgmi.hive_id) in amdgpu_get_xgmi_hive() 371 if (hive->hive_id == adev->gmc.xgmi.hive_id) in amdgpu_get_xgmi_hive() 395 hive->hive_id = adev->gmc.xgmi.hive_id; in amdgpu_get_xgmi_hive() 466 request_adev->gmc.xgmi.node_id, in amdgpu_xgmi_set_pstate() 467 request_adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_set_pstate() 495 adev->gmc.xgmi.node_id, in amdgpu_xgmi_update_topology() 496 adev->gmc.xgmi.hive_id, ret); in amdgpu_xgmi_update_topology() 516 if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id) in amdgpu_xgmi_get_hops_count() 528 if (top->nodes[i].node_id == peer_adev->gmc.xgmi.node_id) in amdgpu_xgmi_get_num_links() [all …]
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D | gmc_v10_0.c | 179 adev->gmc.vm_fault.num_types = 1; in gmc_v10_0_set_irq_funcs() 180 adev->gmc.vm_fault.funcs = &gmc_v10_0_irq_funcs; in gmc_v10_0_set_irq_funcs() 183 adev->gmc.ecc_irq.num_types = 1; in gmc_v10_0_set_irq_funcs() 184 adev->gmc.ecc_irq.funcs = &gmc_v10_0_ecc_funcs; in gmc_v10_0_set_irq_funcs() 238 spin_lock(&adev->gmc.invalidate_lock); in gmc_v10_0_flush_vm_hub() 296 spin_unlock(&adev->gmc.invalidate_lock); in gmc_v10_0_flush_vm_hub() 585 if (!adev->gmc.translate_further) in gmc_v10_0_get_vm_pde() 655 if (adev->gmc.gmc_funcs == NULL) in gmc_v10_0_set_gmc_funcs() 656 adev->gmc.gmc_funcs = &gmc_v10_0_gmc_funcs; in gmc_v10_0_set_gmc_funcs() 717 adev->gmc.shared_aperture_start = 0x2000000000000000ULL; in gmc_v10_0_early_init() [all …]
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D | gmc_v7_0.c | 159 err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); in gmc_v7_0_init_microcode() 162 err = amdgpu_ucode_validate(adev->gmc.fw); in gmc_v7_0_init_microcode() 167 release_firmware(adev->gmc.fw); in gmc_v7_0_init_microcode() 168 adev->gmc.fw = NULL; in gmc_v7_0_init_microcode() 189 if (!adev->gmc.fw) in gmc_v7_0_mc_load_microcode() 192 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v7_0_mc_load_microcode() 195 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v7_0_mc_load_microcode() 198 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v7_0_mc_load_microcode() 201 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v7_0_mc_load_microcode() 291 adev->gmc.vram_start >> 12); in gmc_v7_0_mc_program() [all …]
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D | gmc_v8_0.c | 267 err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); in gmc_v8_0_init_microcode() 270 err = amdgpu_ucode_validate(adev->gmc.fw); in gmc_v8_0_init_microcode() 275 release_firmware(adev->gmc.fw); in gmc_v8_0_init_microcode() 276 adev->gmc.fw = NULL; in gmc_v8_0_init_microcode() 305 if (!adev->gmc.fw) in gmc_v8_0_tonga_mc_load_microcode() 308 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v8_0_tonga_mc_load_microcode() 311 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v8_0_tonga_mc_load_microcode() 314 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v8_0_tonga_mc_load_microcode() 317 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v8_0_tonga_mc_load_microcode() 374 if (!adev->gmc.fw) in gmc_v8_0_polaris_mc_load_microcode() [all …]
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D | gmc_v6_0.c | 134 err = request_firmware(&adev->gmc.fw, fw_name, adev->dev); in gmc_v6_0_init_microcode() 138 err = amdgpu_ucode_validate(adev->gmc.fw); in gmc_v6_0_init_microcode() 145 release_firmware(adev->gmc.fw); in gmc_v6_0_init_microcode() 146 adev->gmc.fw = NULL; in gmc_v6_0_init_microcode() 159 if (!adev->gmc.fw) in gmc_v6_0_mc_load_microcode() 162 hdr = (const struct mc_firmware_header_v1_0 *)adev->gmc.fw->data; in gmc_v6_0_mc_load_microcode() 166 adev->gmc.fw_version = le32_to_cpu(hdr->header.ucode_version); in gmc_v6_0_mc_load_microcode() 169 (adev->gmc.fw->data + le32_to_cpu(hdr->io_debug_array_offset_bytes)); in gmc_v6_0_mc_load_microcode() 172 (adev->gmc.fw->data + le32_to_cpu(hdr->header.ucode_array_offset_bytes)); in gmc_v6_0_mc_load_microcode() 257 adev->gmc.vram_start >> 12); in gmc_v6_0_mc_program() [all …]
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D | gfxhub_v1_0.c | 58 if (adev->gmc.pdb0_bo) in gfxhub_v1_0_init_gart_aperture_regs() 59 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in gfxhub_v1_0_init_gart_aperture_regs() 68 if (adev->gmc.pdb0_bo) { in gfxhub_v1_0_init_gart_aperture_regs() 70 (u32)(adev->gmc.fb_start >> 12)); in gfxhub_v1_0_init_gart_aperture_regs() 72 (u32)(adev->gmc.fb_start >> 44)); in gfxhub_v1_0_init_gart_aperture_regs() 75 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v1_0_init_gart_aperture_regs() 77 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v1_0_init_gart_aperture_regs() 80 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v1_0_init_gart_aperture_regs() 82 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v1_0_init_gart_aperture_regs() 85 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v1_0_init_gart_aperture_regs() [all …]
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D | amdgpu_gmc.h | 265 #define amdgpu_gmc_flush_gpu_tlb(adev, vmid, vmhub, type) ((adev)->gmc.gmc_funcs->flush_gpu_tlb((ad… 267 ((adev)->gmc.gmc_funcs->flush_gpu_tlb_pasid \ 269 #define amdgpu_gmc_emit_flush_gpu_tlb(r, vmid, addr) (r)->adev->gmc.gmc_funcs->emit_flush_gpu_tlb((… 270 #define amdgpu_gmc_emit_pasid_mapping(r, vmid, pasid) (r)->adev->gmc.gmc_funcs->emit_pasid_mapping(… 271 #define amdgpu_gmc_map_mtype(adev, flags) (adev)->gmc.gmc_funcs->map_mtype((adev),(flags)) 272 #define amdgpu_gmc_get_vm_pde(adev, level, dst, flags) (adev)->gmc.gmc_funcs->get_vm_pde((adev), (l… 273 #define amdgpu_gmc_get_vm_pte(adev, mapping, flags) (adev)->gmc.gmc_funcs->get_vm_pte((adev), (mapp… 274 #define amdgpu_gmc_get_vbios_fb_size(adev) (adev)->gmc.gmc_funcs->get_vbios_fb_size((adev)) 284 static inline bool amdgpu_gmc_vram_full_visible(struct amdgpu_gmc *gmc) in amdgpu_gmc_vram_full_visible() argument 286 WARN_ON(gmc->real_vram_size < gmc->visible_vram_size); in amdgpu_gmc_vram_full_visible() [all …]
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D | gfxhub_v1_1.c | 86 if (max_region || adev->gmc.xgmi.connected_to_cpu) { in gfxhub_v1_1_get_xgmi_info() 87 adev->gmc.xgmi.num_physical_nodes = max_region + 1; in gfxhub_v1_1_get_xgmi_info() 89 if (adev->gmc.xgmi.num_physical_nodes > max_num_physical_nodes) in gfxhub_v1_1_get_xgmi_info() 92 adev->gmc.xgmi.physical_node_id = in gfxhub_v1_1_get_xgmi_info() 96 if (adev->gmc.xgmi.physical_node_id > max_physical_node_id) in gfxhub_v1_1_get_xgmi_info() 99 adev->gmc.xgmi.node_segment_size = seg_size; in gfxhub_v1_1_get_xgmi_info()
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D | gfxhub_v2_1.c | 144 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v2_1_init_gart_aperture_regs() 146 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v2_1_init_gart_aperture_regs() 149 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v2_1_init_gart_aperture_regs() 151 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v2_1_init_gart_aperture_regs() 160 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_1_init_system_aperture_regs() 161 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_1_init_system_aperture_regs() 165 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in gfxhub_v2_1_init_system_aperture_regs() 167 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in gfxhub_v2_1_init_system_aperture_regs() 236 if (adev->gmc.translate_further) { in gfxhub_v2_1_init_cache_regs() 323 !adev->gmc.noretry); in gfxhub_v2_1_setup_vmid_config() [all …]
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D | mmhub_v1_0.c | 48 adev->gmc.fb_start = base; in mmhub_v1_0_get_fb_location() 49 adev->gmc.fb_end = top; in mmhub_v1_0_get_fb_location() 75 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v1_0_init_gart_aperture_regs() 77 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v1_0_init_gart_aperture_regs() 80 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v1_0_init_gart_aperture_regs() 82 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v1_0_init_gart_aperture_regs() 92 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v1_0_init_system_aperture_regs() 93 WREG32_SOC15(MMHUB, 0, mmMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v1_0_init_system_aperture_regs() 97 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in mmhub_v1_0_init_system_aperture_regs() 107 max((adev->gmc.fb_end >> 18) + 0x1, in mmhub_v1_0_init_system_aperture_regs() [all …]
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D | gfxhub_v2_0.c | 141 (u32)(adev->gmc.gart_start >> 12)); in gfxhub_v2_0_init_gart_aperture_regs() 143 (u32)(adev->gmc.gart_start >> 44)); in gfxhub_v2_0_init_gart_aperture_regs() 146 (u32)(adev->gmc.gart_end >> 12)); in gfxhub_v2_0_init_gart_aperture_regs() 148 (u32)(adev->gmc.gart_end >> 44)); in gfxhub_v2_0_init_gart_aperture_regs() 158 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in gfxhub_v2_0_init_system_aperture_regs() 159 WREG32_SOC15(GC, 0, mmGCMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in gfxhub_v2_0_init_system_aperture_regs() 163 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in gfxhub_v2_0_init_system_aperture_regs() 165 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in gfxhub_v2_0_init_system_aperture_regs() 233 if (adev->gmc.translate_further) { in gfxhub_v2_0_init_cache_regs() 314 !adev->gmc.noretry); in gfxhub_v2_0_setup_vmid_config()
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D | mmhub_v2_3.c | 139 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v2_3_init_gart_aperture_regs() 141 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v2_3_init_gart_aperture_regs() 144 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v2_3_init_gart_aperture_regs() 146 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v2_3_init_gart_aperture_regs() 156 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_3_init_system_aperture_regs() 157 WREG32_SOC15(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_3_init_system_aperture_regs() 161 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in mmhub_v2_3_init_system_aperture_regs() 163 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in mmhub_v2_3_init_system_aperture_regs() 227 if (adev->gmc.translate_further) { in mmhub_v2_3_init_cache_regs() 312 !adev->gmc.noretry); in mmhub_v2_3_setup_vmid_config() [all …]
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D | aldebaran.c | 51 if (adev->gmc.xgmi.connected_to_cpu) { in aldebaran_get_reset_handler() 150 gmc.xgmi.head) { in aldebaran_mode2_perform_reset() 159 gmc.xgmi.head) { in aldebaran_mode2_perform_reset() 161 if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) { in aldebaran_mode2_perform_reset() 179 gmc.xgmi.head) { in aldebaran_mode2_perform_reset() 180 if (tmp_adev->gmc.xgmi.num_physical_nodes > 1) { in aldebaran_mode2_perform_reset() 190 gmc.xgmi.head) { in aldebaran_mode2_perform_reset() 329 gmc.xgmi.head) { in aldebaran_mode2_restore_hwcontext() 347 tmp_adev->gmc.xgmi.num_physical_nodes > 1) in aldebaran_mode2_restore_hwcontext()
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D | mmhub_v1_7.c | 48 adev->gmc.fb_start = base; in mmhub_v1_7_get_fb_location() 49 adev->gmc.fb_end = top; in mmhub_v1_7_get_fb_location() 70 if (adev->gmc.pdb0_bo) in mmhub_v1_7_init_gart_aperture_regs() 71 pt_base = amdgpu_gmc_pd_addr(adev->gmc.pdb0_bo); in mmhub_v1_7_init_gart_aperture_regs() 80 if (adev->gmc.pdb0_bo) { in mmhub_v1_7_init_gart_aperture_regs() 82 (u32)(adev->gmc.fb_start >> 12)); in mmhub_v1_7_init_gart_aperture_regs() 84 (u32)(adev->gmc.fb_start >> 44)); in mmhub_v1_7_init_gart_aperture_regs() 87 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v1_7_init_gart_aperture_regs() 89 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v1_7_init_gart_aperture_regs() 93 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v1_7_init_gart_aperture_regs() [all …]
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D | amdgpu_test.c | 47 n = adev->gmc.gart_size - atomic64_read(&adev->gart_pin_size); in amdgpu_do_test_moves() 155 (gart_addr - adev->gmc.gart_start + in amdgpu_do_test_moves() 158 (vram_addr - adev->gmc.vram_start + in amdgpu_do_test_moves() 201 (vram_addr - adev->gmc.vram_start + in amdgpu_do_test_moves() 204 (gart_addr - adev->gmc.gart_start + in amdgpu_do_test_moves() 214 gart_addr - adev->gmc.gart_start); in amdgpu_do_test_moves()
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D | mmhub_v2_0.c | 212 (u32)(adev->gmc.gart_start >> 12)); in mmhub_v2_0_init_gart_aperture_regs() 214 (u32)(adev->gmc.gart_start >> 44)); in mmhub_v2_0_init_gart_aperture_regs() 217 (u32)(adev->gmc.gart_end >> 12)); in mmhub_v2_0_init_gart_aperture_regs() 219 (u32)(adev->gmc.gart_end >> 44)); in mmhub_v2_0_init_gart_aperture_regs() 230 WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_BOT, adev->gmc.agp_start >> 24); in mmhub_v2_0_init_system_aperture_regs() 231 WREG32_SOC15_RLC(MMHUB, 0, mmMMMC_VM_AGP_TOP, adev->gmc.agp_end >> 24); in mmhub_v2_0_init_system_aperture_regs() 235 min(adev->gmc.fb_start, adev->gmc.agp_start) >> 18); in mmhub_v2_0_init_system_aperture_regs() 237 max(adev->gmc.fb_end, adev->gmc.agp_end) >> 18); in mmhub_v2_0_init_system_aperture_regs() 308 if (adev->gmc.translate_further) { in mmhub_v2_0_init_cache_regs() 399 !adev->gmc.noretry); in mmhub_v2_0_setup_vmid_config()
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D | amdgpu_vram_mgr.c | 65 return sysfs_emit(buf, "%llu\n", adev->gmc.real_vram_size); in amdgpu_mem_info_vram_total_show() 82 return sysfs_emit(buf, "%llu\n", adev->gmc.visible_vram_size); in amdgpu_mem_info_vis_vram_total_show() 140 switch (adev->gmc.vram_vendor) { in amdgpu_mem_info_vram_vendor() 204 if (start >= adev->gmc.visible_vram_size) in amdgpu_vram_mgr_vis_size() 207 return (end > adev->gmc.visible_vram_size ? in amdgpu_vram_mgr_vis_size() 208 adev->gmc.visible_vram_size : end) - start; in amdgpu_vram_mgr_vis_size() 227 if (amdgpu_gmc_vram_full_visible(&adev->gmc)) in amdgpu_vram_mgr_bo_visible_size() 230 if (res->start >= adev->gmc.visible_vram_size >> PAGE_SHIFT) in amdgpu_vram_mgr_bo_visible_size() 387 max_bytes = adev->gmc.mc_vram_size; in amdgpu_vram_mgr_new() 466 if (adev->gmc.xgmi.connected_to_cpu) in amdgpu_vram_mgr_new() [all …]
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D | amdgpu_ttm.c | 142 } else if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && in amdgpu_evict_flags() 154 abo->placements[0].fpfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; in amdgpu_evict_flags() 215 *addr = adev->gmc.gart_start; in amdgpu_ttm_map_buffer() 452 return cursor.start + cursor.size <= adev->gmc.visible_vram_size; in amdgpu_mem_visible() 586 if ((mem->bus.offset + bus_size) > adev->gmc.visible_vram_size) in amdgpu_ttm_io_mem_reserve() 594 mem->bus.offset += adev->gmc.aper_base; in amdgpu_ttm_io_mem_reserve() 611 return (adev->gmc.aper_base + cursor.start) >> PAGE_SHIFT; in amdgpu_ttm_io_mem_pfn() 627 return adev->gmc.gart_start; in amdgpu_ttm_domain_start() 629 return adev->gmc.vram_start; in amdgpu_ttm_domain_start() 980 placements.lpfn = adev->gmc.gart_size >> PAGE_SHIFT; in amdgpu_ttm_alloc_gart() [all …]
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D | amdgpu_amdkfd.c | 77 amdgpu_amdkfd_total_mem_size += adev->gmc.real_vram_size; in amdgpu_amdkfd_device_probe() 408 mem_info->local_mem_size_public = adev->gmc.visible_vram_size; in amdgpu_amdkfd_get_local_mem_info() 409 mem_info->local_mem_size_private = adev->gmc.real_vram_size - in amdgpu_amdkfd_get_local_mem_info() 410 adev->gmc.visible_vram_size; in amdgpu_amdkfd_get_local_mem_info() 412 mem_info->vram_width = adev->gmc.vram_width; in amdgpu_amdkfd_get_local_mem_info() 415 &adev->gmc.aper_base, in amdgpu_amdkfd_get_local_mem_info() 542 return adev->gmc.xgmi.hive_id; in amdgpu_amdkfd_get_hive_id() 560 adev->gmc.xgmi.physical_node_id, in amdgpu_amdkfd_get_xgmi_hops_count() 561 peer_adev->gmc.xgmi.physical_node_id, ret); in amdgpu_amdkfd_get_xgmi_hops_count() 582 adev->gmc.xgmi.physical_node_id, in amdgpu_amdkfd_get_xgmi_bandwidth_mbytes() [all …]
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D | amdgpu_xgmi.h | 70 adev->gmc.xgmi.hive_id && in amdgpu_xgmi_same_hive() 71 adev->gmc.xgmi.hive_id == bo_adev->gmc.xgmi.hive_id); in amdgpu_xgmi_same_hive()
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D | amdgpu_object.c | 133 unsigned visible_pfn = adev->gmc.visible_vram_size >> PAGE_SHIFT; in amdgpu_bo_placement_from_domain() 596 if (!amdgpu_gmc_vram_full_visible(&adev->gmc) && in amdgpu_bo_create() 598 bo->tbo.resource->start < adev->gmc.visible_vram_size >> PAGE_SHIFT) in amdgpu_bo_create() 1072 if (!adev->gmc.xgmi.connected_to_cpu) { in amdgpu_bo_init() 1074 arch_io_reserve_memtype_wc(adev->gmc.aper_base, in amdgpu_bo_init() 1075 adev->gmc.aper_size); in amdgpu_bo_init() 1078 adev->gmc.vram_mtrr = arch_phys_wc_add(adev->gmc.aper_base, in amdgpu_bo_init() 1079 adev->gmc.aper_size); in amdgpu_bo_init() 1083 adev->gmc.mc_vram_size >> 20, in amdgpu_bo_init() 1084 (unsigned long long)adev->gmc.aper_size >> 20); in amdgpu_bo_init() [all …]
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D | amdgpu_device.c | 362 last = min(pos + size, adev->gmc.visible_vram_size); in amdgpu_device_aper_access() 1191 int rbar_size = pci_rebar_bytes_to_size(adev->gmc.real_vram_size); in amdgpu_device_resize_fb_bar() 1206 if (adev->gmc.real_vram_size && in amdgpu_device_resize_fb_bar() 1207 (pci_resource_len(adev->pdev, 0) >= adev->gmc.real_vram_size)) in amdgpu_device_resize_fb_bar() 1302 if (adev->gmc.xgmi.pending_reset) in amdgpu_device_need_post() 2525 if (adev->gmc.xgmi.num_physical_nodes > 1) in amdgpu_device_ip_init() 2529 if (!adev->gmc.xgmi.pending_reset) in amdgpu_device_ip_init() 2749 adev->gmc.xgmi.num_physical_nodes > 1) in amdgpu_device_ip_late_init() 2752 if (adev->gmc.xgmi.num_physical_nodes > 1) { in amdgpu_device_ip_late_init() 2768 if (mgpu_info.num_dgpu == adev->gmc.xgmi.num_physical_nodes) { in amdgpu_device_ip_late_init() [all …]
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/drivers/video/fbdev/ |
D | w100fb.c | 296 union dp_gui_master_cntl_u gmc; in w100_init_graphic_engine() local 322 gmc.val = 0; in w100_init_graphic_engine() 323 gmc.f.gmc_src_pitch_offset_cntl = 1; in w100_init_graphic_engine() 324 gmc.f.gmc_dst_pitch_offset_cntl = 1; in w100_init_graphic_engine() 325 gmc.f.gmc_src_clipping = 1; in w100_init_graphic_engine() 326 gmc.f.gmc_dst_clipping = 1; in w100_init_graphic_engine() 327 gmc.f.gmc_brush_datatype = GMC_BRUSH_NONE; in w100_init_graphic_engine() 328 gmc.f.gmc_dst_datatype = 3; /* from DstType_16Bpp_444 */ in w100_init_graphic_engine() 329 gmc.f.gmc_src_datatype = SRC_DATATYPE_EQU_DST; in w100_init_graphic_engine() 330 gmc.f.gmc_byte_pix_order = 1; in w100_init_graphic_engine() [all …]
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