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Searched refs:msix_vector (Results 1 – 18 of 18) sorted by relevance

/drivers/virtio/
Dvirtio_pci_common.c234 int v = vp_dev->vqs[vq->index]->msix_vector; in vp_del_vqs()
434 mask = vp_dev->msix_affinity_masks[info->msix_vector]; in vp_set_vq_affinity()
435 irq = pci_irq_vector(vp_dev->pci_dev, info->msix_vector); in vp_set_vq_affinity()
451 vp_dev->vqs[index]->msix_vector == VIRTIO_MSI_NO_VECTOR) in vp_get_vq_affinity()
455 vp_dev->vqs[index]->msix_vector); in vp_get_vq_affinity()
Dvirtio_pci_common.h40 unsigned msix_vector; member
Dvirtio_pci_legacy.c134 info->msix_vector = msix_vec; in setup_vq()
Dvirtio_pci_modern.c211 info->msix_vector = msix_vec; in setup_vq()
/drivers/infiniband/hw/bnxt_re/
Dqplib_rcfw.h201 int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector,
204 int msix_vector,
Dqplib_rcfw.c690 int bnxt_qplib_rcfw_start_irq(struct bnxt_qplib_rcfw *rcfw, int msix_vector, in bnxt_qplib_rcfw_start_irq() argument
703 creq->msix_vec = msix_vector; in bnxt_qplib_rcfw_start_irq()
823 int msix_vector, in bnxt_qplib_enable_rcfw_channel() argument
852 rc = bnxt_qplib_rcfw_start_irq(rcfw, msix_vector, true); in bnxt_qplib_enable_rcfw_channel()
Dqplib_fp.h498 int msix_vector, bool need_init);
500 int nq_idx, int msix_vector, int bar_reg_offset,
Dqplib_fp.c464 int msix_vector, bool need_init) in bnxt_qplib_nq_start_irq() argument
472 nq->msix_vec = msix_vector; in bnxt_qplib_nq_start_irq()
542 int nq_idx, int msix_vector, int bar_reg_offset, in bnxt_qplib_enable_nq() argument
561 rc = bnxt_qplib_nq_start_irq(nq, nq_idx, msix_vector, true); in bnxt_qplib_enable_nq()
/drivers/net/ethernet/amazon/ena/
Dena_com.h121 u32 msix_vector; member
168 u32 msix_vector; member
350 u32 msix_vector; member
Dena_netdev.c2401 u32 msix_vector; in ena_create_io_tx_queue() local
2408 msix_vector = ENA_IO_IRQ_IDX(qid); in ena_create_io_tx_queue()
2416 ctx.msix_vector = msix_vector; in ena_create_io_tx_queue()
2469 u32 msix_vector; in ena_create_io_rx_queue() local
2476 msix_vector = ENA_IO_IRQ_IDX(qid); in ena_create_io_rx_queue()
2484 ctx.msix_vector = msix_vector; in ena_create_io_rx_queue()
Dena_admin_defs.h298 u32 msix_vector; member
Dena_com.c1406 create_cmd.msix_vector = io_cq->msix_vector; in ena_com_create_io_cq()
1898 io_cq->msix_vector = ctx->msix_vector; in ena_com_create_io_queue()
/drivers/net/ethernet/intel/igbvf/
Dnetdev.c926 int tx_queue, int msix_vector) in igbvf_assign_vector() argument
942 ivar |= (msix_vector | E1000_IVAR_VALID) << 16; in igbvf_assign_vector()
946 ivar |= msix_vector | E1000_IVAR_VALID; in igbvf_assign_vector()
948 adapter->rx_ring[rx_queue].eims_value = BIT(msix_vector); in igbvf_assign_vector()
957 ivar |= (msix_vector | E1000_IVAR_VALID) << 24; in igbvf_assign_vector()
961 ivar |= (msix_vector | E1000_IVAR_VALID) << 8; in igbvf_assign_vector()
963 adapter->tx_ring[tx_queue].eims_value = BIT(msix_vector); in igbvf_assign_vector()
/drivers/net/ethernet/intel/igb/
Digb_main.c766 static void igb_write_ivar(struct e1000_hw *hw, int msix_vector, in igb_write_ivar() argument
775 ivar |= (msix_vector | E1000_IVAR_VALID) << offset; in igb_write_ivar()
781 static void igb_assign_vector(struct igb_q_vector *q_vector, int msix_vector) in igb_assign_vector() argument
805 if (!(adapter->flags & IGB_FLAG_HAS_MSIX) && msix_vector == 0) in igb_assign_vector()
807 array_wr32(E1000_MSIXBM(0), msix_vector, msixbm); in igb_assign_vector()
817 igb_write_ivar(hw, msix_vector, in igb_assign_vector()
821 igb_write_ivar(hw, msix_vector, in igb_assign_vector()
824 q_vector->eims_value = BIT(msix_vector); in igb_assign_vector()
838 igb_write_ivar(hw, msix_vector, in igb_assign_vector()
842 igb_write_ivar(hw, msix_vector, in igb_assign_vector()
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/drivers/net/ethernet/intel/ixgbevf/
Dixgbevf_main.c167 u8 queue, u8 msix_vector) in ixgbevf_set_ivar() argument
174 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbevf_set_ivar()
177 ivar |= msix_vector; in ixgbevf_set_ivar()
181 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbevf_set_ivar()
185 ivar |= (msix_vector << index); in ixgbevf_set_ivar()
/drivers/net/ethernet/intel/igc/
Digc_main.c3860 static void igc_write_ivar(struct igc_hw *hw, int msix_vector, in igc_write_ivar() argument
3869 ivar |= (msix_vector | IGC_IVAR_VALID) << offset; in igc_write_ivar()
3874 static void igc_assign_vector(struct igc_q_vector *q_vector, int msix_vector) in igc_assign_vector() argument
3889 igc_write_ivar(hw, msix_vector, in igc_assign_vector()
3893 igc_write_ivar(hw, msix_vector, in igc_assign_vector()
3896 q_vector->eims_value = BIT(msix_vector); in igc_assign_vector()
/drivers/net/ethernet/qlogic/qlcnic/
Dqlcnic_83xx_hw.c1328 u32 msix_vector; in qlcnic_83xx_create_tx_ctx() local
1345 msix_vector = adapter->drv_sds_rings + ring; in qlcnic_83xx_create_tx_ctx()
1347 msix_vector = adapter->drv_sds_rings - 1; in qlcnic_83xx_create_tx_ctx()
1348 msix_id = ahw->intr_tbl[msix_vector].id; in qlcnic_83xx_create_tx_ctx()
/drivers/net/ethernet/intel/ixgbe/
Dixgbe_main.c855 u8 queue, u8 msix_vector) in ixgbe_set_ivar() argument
861 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbe_set_ivar()
867 ivar |= (msix_vector << (8 * (queue & 0x3))); in ixgbe_set_ivar()
877 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbe_set_ivar()
881 ivar |= (msix_vector << index); in ixgbe_set_ivar()
886 msix_vector |= IXGBE_IVAR_ALLOC_VAL; in ixgbe_set_ivar()
890 ivar |= (msix_vector << index); in ixgbe_set_ivar()