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Searched refs:microcode (Results 1 – 21 of 21) sorted by relevance

/arch/x86/kernel/cpu/microcode/
DMakefile2 microcode-y := core.o
3 obj-$(CONFIG_MICROCODE) += microcode.o
4 microcode-$(CONFIG_MICROCODE_INTEL) += intel.o
5 microcode-$(CONFIG_MICROCODE_AMD) += amd.o
Dintel.c729 csig->rev = c->microcode; in collect_cpu_info()
804 c->microcode = rev; in apply_microcode_intel()
808 boot_cpu_data.microcode = rev; in apply_microcode_intel()
911 c->microcode < 0x0b000021) { in is_blacklisted()
912 …rr_once("Erratum BDF90: late loading with revision < 0x0b000021 (0x%x) disabled.\n", c->microcode); in is_blacklisted()
Dcore.c511 int old = boot_cpu_data.microcode, ret; in microcode_reload_late()
526 old, boot_cpu_data.microcode); in microcode_reload_late()
530 boot_cpu_data.microcode); in microcode_reload_late()
Damd.c664 csig->rev = c->microcode; in collect_cpu_info_amd()
720 c->microcode = rev; in apply_microcode_amd()
724 boot_cpu_data.microcode = rev; in apply_microcode_amd()
872 if (c->microcode >= p->patch_id) in load_microcode_amd()
/arch/x86/include/uapi/asm/
Dmce.h37 __u32 microcode; /* Microcode revision */ member
/arch/x86/kernel/cpu/
Dproc.c83 if (c->microcode) in show_cpuinfo()
84 seq_printf(m, "microcode\t: 0x%x\n", c->microcode); in show_cpuinfo()
Dmatch.c86 if (!res || res->x86_microcode_rev > boot_cpu_data.microcode) in x86_cpu_has_min_microcode_rev()
Dintel.c136 u32 microcode; member
179 return (c->microcode <= spectre_bad_microcodes[i].microcode); in bad_spectre_microcode()
286 c->microcode = intel_get_microcode_revision(); in early_init_intel()
313 c->microcode < 0x20e) { in early_init_intel()
DMakefile49 obj-$(CONFIG_MICROCODE) += microcode/
Dhygon.c252 rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); in early_init_hygon()
Damd.c710 rdmsr_safe(MSR_AMD64_PATCH_LEVEL, &c->microcode, &dummy); in early_init_amd()
1035 if (boot_cpu_data.microcode < good_rev) in cpu_has_zenbleed_microcode()
/arch/x86/kernel/cpu/mce/
Dinject.c107 m->microcode = boot_cpu_data.microcode; in setup_inj_struct()
Dcore.c151 m->microcode = boot_cpu_data.microcode; in mce_setup()
241 m->microcode); in __print_mce()
/arch/x86/
DKconfig1287 bool "CPU microcode loading support"
1291 If you say Y here, you will be able to update the microcode on
1295 the actual microcode binary data itself which is not shipped with
1298 The preferred method to load microcode from a detached initrd is described
1299 in Documentation/x86/microcode.rst. For that you need to enable
1301 initrd for microcode blobs.
1303 In addition, you can build the microcode into the kernel. For that you
1304 need to add the vendor-supplied microcode to the CONFIG_EXTRA_FIRMWARE
1308 bool "Intel microcode loading support"
1312 This options enables microcode patch loading support for Intel
[all …]
/arch/powerpc/platforms/8xx/
DKconfig154 This microcode relocates SMC1 and SMC2 parameter RAMs at
/arch/x86/include/asm/
Dprocessor.h141 u32 microcode; member
/arch/powerpc/boot/dts/fsl/
Dp1021rdb-pc.dtsi74 label = "NOR QE microcode firmware";
Dp1021mds.dts80 /* 1MB for microcode */
Dp1025twr.dtsi81 label = "NOR QE microcode firmware";
/arch/x86/kernel/apic/
Dapic.c599 if (boot_cpu_data.microcode >= rev) in apic_validate_deadline_timer()
/arch/m68k/fpsp040/
Dres_func.S1968 | the 040 uses the dtag to execute the correct microcode.