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Searched refs:amdgpu_ring_emit_wreg (Results 1 – 17 of 17) sorted by relevance

/drivers/gpu/drm/amd/amdgpu/
Dhdp_v4_0.c46amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in hdp_v4_0_flush_hdp()
58 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in hdp_v4_0_invalidate_hdp()
Dhdp_v5_0.c37amdgpu_ring_emit_wreg(ring, (adev->rmmio_remap.reg_offset + KFD_MMIO_REMAP_HDP_MEM_FLUSH_CNTL) >> … in hdp_v5_0_flush_hdp()
46 amdgpu_ring_emit_wreg(ring, SOC15_REG_OFFSET( in hdp_v5_0_invalidate_hdp()
Dgmc_v10_0.c487 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v10_0_emit_flush_gpu_tlb()
491 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v10_0_emit_flush_gpu_tlb()
507 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v10_0_emit_flush_gpu_tlb()
524 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v10_0_emit_pasid_mapping()
Dgmc_v9_0.c960 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_lo32 + in gmc_v9_0_emit_flush_gpu_tlb()
964 amdgpu_ring_emit_wreg(ring, hub->ctx0_ptb_addr_hi32 + in gmc_v9_0_emit_flush_gpu_tlb()
980 amdgpu_ring_emit_wreg(ring, hub->vm_inv_eng0_sem + in gmc_v9_0_emit_flush_gpu_tlb()
1001 amdgpu_ring_emit_wreg(ring, reg, pasid); in gmc_v9_0_emit_pasid_mapping()
Dgmc_v7_0.c491 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v7_0_emit_flush_gpu_tlb()
494 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v7_0_emit_flush_gpu_tlb()
502 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v7_0_emit_pasid_mapping()
Dgmc_v6_0.c371 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v6_0_emit_flush_gpu_tlb()
374 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v6_0_emit_flush_gpu_tlb()
Damdgpu_ring.c325 amdgpu_ring_emit_wreg(ring, reg0, ref); in amdgpu_ring_emit_reg_write_reg_wait_helper()
Dgmc_v8_0.c690 amdgpu_ring_emit_wreg(ring, reg, pd_addr >> 12); in gmc_v8_0_emit_flush_gpu_tlb()
693 amdgpu_ring_emit_wreg(ring, mmVM_INVALIDATE_REQUEST, 1 << vmid); in gmc_v8_0_emit_flush_gpu_tlb()
701 amdgpu_ring_emit_wreg(ring, mmIH_VMID_0_LUT + vmid, pasid); in gmc_v8_0_emit_pasid_mapping()
Damdgpu_ring.h273 #define amdgpu_ring_emit_wreg(r, d, v) (r)->funcs->emit_wreg((r), (d), (v)) macro
Dcik.c1879 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in cik_flush_hdp()
1890 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in cik_invalidate_hdp()
Dvi.c1341 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in vi_flush_hdp()
1352 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in vi_invalidate_hdp()
Dsi.c1489 amdgpu_ring_emit_wreg(ring, mmHDP_MEM_COHERENCY_FLUSH_CNTL, 1); in si_flush_hdp()
1500 amdgpu_ring_emit_wreg(ring, mmHDP_DEBUG0, 1); in si_invalidate_hdp()
Damdgpu_gfx.c809 amdgpu_ring_emit_wreg(ring, reg, v); in amdgpu_kiq_wreg()
Dsdma_v5_2.c1210 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v5_2_ring_emit_reg_write_reg_wait()
Dsdma_v5_0.c1288 amdgpu_ring_emit_wreg(ring, reg0, ref); in sdma_v5_0_ring_emit_reg_write_reg_wait()
Dgfx_v8_0.c6880 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v8_0_emit_wave_limit_cs()
6896 amdgpu_ring_emit_wreg(ring, mmSPI_WCL_PIPE_PERCENT_GFX, val); in gfx_v8_0_emit_wave_limit()
Dgfx_v9_0.c6847 amdgpu_ring_emit_wreg(ring, wcl_cs_reg, val); in gfx_v9_0_emit_wave_limit_cs()
6862 amdgpu_ring_emit_wreg(ring, in gfx_v9_0_emit_wave_limit()