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Searched refs:ctl_reg (Results 1 – 25 of 43) sorted by relevance

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/drivers/clk/bcm/
Dclk-bcm2835.c491 u32 ctl_reg; member
514 u32 ctl_reg; member
933 return (cprman_read(cprman, data->ctl_reg) & CM_ENABLE) != 0; in bcm2835_clock_is_on()
1049 while (cprman_read(cprman, data->ctl_reg) & CM_BUSY) { in bcm2835_clock_wait_busy()
1066 cprman_write(cprman, data->ctl_reg, in bcm2835_clock_off()
1067 cprman_read(cprman, data->ctl_reg) & ~CM_ENABLE); in bcm2835_clock_off()
1081 cprman_write(cprman, data->ctl_reg, in bcm2835_clock_on()
1082 cprman_read(cprman, data->ctl_reg) | in bcm2835_clock_on()
1120 ctl = cprman_read(cprman, data->ctl_reg) & ~CM_FRAC; in bcm2835_clock_set_rate()
1122 cprman_write(cprman, data->ctl_reg, ctl); in bcm2835_clock_set_rate()
[all …]
/drivers/i2c/busses/
Di2c-brcmstb.c83 u32 ctl_reg; /* control register */ member
206 dev->bsc_regmap->ctl_reg |= BSC_CTL_REG_INT_EN_MASK; in brcmstb_i2c_enable_disable_irq()
209 dev->bsc_regmap->ctl_reg &= ~BSC_CTL_REG_INT_EN_MASK; in brcmstb_i2c_enable_disable_irq()
212 bsc_writel(dev, dev->bsc_regmap->ctl_reg, ctl_reg); in brcmstb_i2c_enable_disable_irq()
218 u32 status_bsc_ctl = bsc_readl(dev, ctl_reg); in brcmstb_i2c_isr()
339 u32 ctl_reg; in brcmstb_i2c_xfer_bsc_data() local
356 ctl_reg = pi2creg->ctl_reg & ~BSC_CTL_REG_DTF_MASK; in brcmstb_i2c_xfer_bsc_data()
358 pi2creg->ctl_reg = ctl_reg | DTF_WR_MASK; in brcmstb_i2c_xfer_bsc_data()
360 pi2creg->ctl_reg = ctl_reg | DTF_RD_MASK; in brcmstb_i2c_xfer_bsc_data()
551 dev->bsc_regmap->ctl_reg &= ~(BSC_CTL_REG_SCL_SEL_MASK in brcmstb_i2c_set_bus_speed()
[all …]
/drivers/pinctrl/qcom/
Dpinctrl-lpass-lpi.c358 u32 ctl_reg; in lpi_config_get() local
360 ctl_reg = lpi_gpio_read(state, pin, LPI_GPIO_CFG_REG); in lpi_config_get()
361 is_out = ctl_reg & LPI_GPIO_OE_MASK; in lpi_config_get()
362 pull = FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg); in lpi_config_get()
546 u32 ctl_reg; in lpi_gpio_dbg_show_one() local
557 ctl_reg = lpi_gpio_read(state, offset, LPI_GPIO_CFG_REG); in lpi_gpio_dbg_show_one()
558 is_out = ctl_reg & LPI_GPIO_OE_MASK; in lpi_gpio_dbg_show_one()
560 func = FIELD_GET(LPI_GPIO_FUNCTION_MASK, ctl_reg); in lpi_gpio_dbg_show_one()
561 drive = FIELD_GET(LPI_GPIO_OUT_STRENGTH_MASK, ctl_reg); in lpi_gpio_dbg_show_one()
562 pull = FIELD_GET(LPI_GPIO_PULL_MASK, ctl_reg); in lpi_gpio_dbg_show_one()
Dpinctrl-msm.h66 u32 ctl_reg; member
Dpinctrl-msm.c607 u32 ctl_reg, io_reg; in msm_gpio_dbg_show_one() local
626 ctl_reg = msm_readl_ctl(pctrl, g); in msm_gpio_dbg_show_one()
629 is_out = !!(ctl_reg & BIT(g->oe_bit)); in msm_gpio_dbg_show_one()
630 func = (ctl_reg >> g->mux_bit) & 7; in msm_gpio_dbg_show_one()
631 drive = (ctl_reg >> g->drv_bit) & 7; in msm_gpio_dbg_show_one()
632 pull = (ctl_reg >> g->pull_bit) & 3; in msm_gpio_dbg_show_one()
Dpinctrl-qdf2xxx.c105 groups[gpio].ctl_reg = 0x10000 * gpio; in qdf2xxx_pinctrl_probe()
Dpinctrl-ipq8064.c190 .ctl_reg = 0x1000 + 0x10 * id, \
217 .ctl_reg = ctl, \
Dpinctrl-sm6115.c50 .ctl_reg = 0x1000 * id, \
77 .ctl_reg = ctl, \
103 .ctl_reg = offset, \
Dpinctrl-sc7180.c48 .ctl_reg = 0x1000 * id, \
75 .ctl_reg = ctl, \
101 .ctl_reg = offset, \
Dpinctrl-msm8x74.c351 .ctl_reg = 0x1000 + 0x10 * id, \
377 .ctl_reg = ctl, \
408 .ctl_reg = ctl, \
Dpinctrl-msm8226.c289 .ctl_reg = 0x1000 + 0x10 * id, \
315 .ctl_reg = ctl, \
Dpinctrl-apq8064.c238 .ctl_reg = 0x1000 + 0x10 * id, \
265 .ctl_reg = ctl, \
Dpinctrl-sm6125.c47 .ctl_reg = 0x1000 * id, \
74 .ctl_reg = ctl, \
100 .ctl_reg = offset, \
Dpinctrl-mdm9607.c232 .ctl_reg = 0x1000 * id, \
258 .ctl_reg = ctl, \
Dpinctrl-msm8998.c42 .ctl_reg = base + 0x1000 * id, \
68 .ctl_reg = ctl, \
93 .ctl_reg = offset, \
Dpinctrl-sc7280.c38 .ctl_reg = 0x1000 * id, \
64 .ctl_reg = ctl, \
89 .ctl_reg = offset, \
Dpinctrl-sm8150.c50 .ctl_reg = 0x1000 * id, \
77 .ctl_reg = ctl, \
103 .ctl_reg = offset, \
Dpinctrl-sm8250.c51 .ctl_reg = REG_SIZE * id, \
78 .ctl_reg = ctl, \
104 .ctl_reg = offset, \
Dpinctrl-sdm845.c44 .ctl_reg = base + REG_SIZE * id, \
70 .ctl_reg = ctl, \
95 .ctl_reg = offset, \
/drivers/net/ethernet/aquantia/atlantic/macsec/
Dmacsec_api.c1996 struct mss_egress_ctl_register ctl_reg; in clear_egress_counters() local
1999 memset(&ctl_reg, 0, sizeof(ctl_reg)); in clear_egress_counters()
2002 &ctl_reg.word_0); in clear_egress_counters()
2007 &ctl_reg.word_1); in clear_egress_counters()
2012 ctl_reg.bits_0.clear_counter = 0; in clear_egress_counters()
2014 MSS_EGRESS_CTL_REGISTER_ADDR, ctl_reg.word_0); in clear_egress_counters()
2019 ctl_reg.word_1); in clear_egress_counters()
2023 ctl_reg.bits_0.clear_counter = 1; in clear_egress_counters()
2025 MSS_EGRESS_CTL_REGISTER_ADDR, ctl_reg.word_0); in clear_egress_counters()
2030 ctl_reg.word_1); in clear_egress_counters()
[all …]
/drivers/scsi/csiostor/
Dcsio_mb.c1162 uint32_t ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A); in csio_mb_debug_cmd_handler() local
1174 MBOWNER_V(CSIO_MBOWNER_FW), ctl_reg); in csio_mb_debug_cmd_handler()
1176 csio_rd_reg32(hw, ctl_reg); in csio_mb_debug_cmd_handler()
1196 uint32_t ctl_reg = PF_REG(hw->pfn, CIM_PF_MAILBOX_CTRL_A); in csio_mb_issue() local
1233 owner = MBOWNER_G(csio_rd_reg32(hw, ctl_reg)); in csio_mb_issue()
1238 owner = MBOWNER_G(csio_rd_reg32(hw, ctl_reg)); in csio_mb_issue()
1281 MBOWNER_V(CSIO_MBOWNER_FW), ctl_reg); in csio_mb_issue()
1284 ctl_reg); in csio_mb_issue()
1287 csio_rd_reg32(hw, ctl_reg); in csio_mb_issue()
1302 ctl = csio_rd_reg32(hw, ctl_reg); in csio_mb_issue()
[all …]
/drivers/misc/
Dphantom.c57 u32 ctl_reg; member
116 r.value |= dev->ctl_reg & PHN_CTL_AMP; in phantom_ioctl()
117 dev->ctl_reg = r.value; in phantom_ioctl()
306 dev->ctl_reg ^= PHN_CTL_AMP; in phantom_isr()
307 iowrite32(dev->ctl_reg, dev->iaddr + PHN_CONTROL); in phantom_isr()
/drivers/net/ethernet/
Ddnet.c175 u32 mode_reg, ctl_reg; in dnet_handle_link_change() local
182 ctl_reg = dnet_readw_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG); in dnet_handle_link_change()
187 ctl_reg &= in dnet_handle_link_change()
190 ctl_reg |= in dnet_handle_link_change()
235 dnet_writew_mac(bp, DNET_INTERNAL_RXTX_CONTROL_REG, ctl_reg); in dnet_handle_link_change()
/drivers/scsi/lpfc/
Dlpfc_debugfs.c4902 void __iomem *ctl_reg; in lpfc_idiag_ctlacc_write() local
4938 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4942 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4946 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4950 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4954 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4958 ctl_reg = phba->sli4_hba.conf_regs_memmap_p + in lpfc_idiag_ctlacc_write()
4968 reg_val = readl(ctl_reg); in lpfc_idiag_ctlacc_write()
4972 reg_val = readl(ctl_reg); in lpfc_idiag_ctlacc_write()
4975 writel(reg_val, ctl_reg); in lpfc_idiag_ctlacc_write()
[all …]
/drivers/gpu/drm/i915/display/
Dintel_hdmi.c511 i915_reg_t ctl_reg = HSW_TVIDEO_DIP_CTL(cpu_transcoder); in hsw_write_infoframe() local
514 u32 val = intel_de_read(dev_priv, ctl_reg); in hsw_write_infoframe()
521 intel_de_write(dev_priv, ctl_reg, val); in hsw_write_infoframe()
541 intel_de_write(dev_priv, ctl_reg, val); in hsw_write_infoframe()
542 intel_de_posting_read(dev_priv, ctl_reg); in hsw_write_infoframe()

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