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Searched refs:irq_source (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_irq.c85 enum dc_irq_source irq_source; member
139 enum dc_irq_source irq_source; in remove_irq_handler() local
143 irq_source = int_params->irq_source; in remove_irq_handler()
147 hnd_list = &adev->dm.irq_handler_list_high_tab[irq_source]; in remove_irq_handler()
151 hnd_list = &adev->dm.irq_handler_list_low_tab[irq_source]; in remove_irq_handler()
183 ih, int_params->irq_source, int_params->int_context); in remove_irq_handler()
252 if (!DAL_VALID_IRQ_SRC_NUM(int_params->irq_source)) { in validate_irq_registration_params()
254 int_params->irq_source); in validate_irq_registration_params()
261 static bool validate_irq_unregistration_params(enum dc_irq_source irq_source, in validate_irq_unregistration_params() argument
269 if (!DAL_VALID_IRQ_SRC_NUM(irq_source)) { in validate_irq_unregistration_params()
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Damdgpu_dm_irq.h80 enum dc_irq_source irq_source,
Damdgpu_dm.c2326 enum dc_irq_source irq_source; in dm_gpureset_toggle_interrupts() local
2336 irq_source = IRQ_TYPE_PFLIP + acrtc->otg_inst; in dm_gpureset_toggle_interrupts()
2337 rc = dc_interrupt_set(adev->dm.dc, irq_source, enable) ? 0 : -EBUSY; in dm_gpureset_toggle_interrupts()
3364 int_params.irq_source = dc_link->irq_source_hpd; in register_hpd_handlers()
3375 int_params.irq_source = dc_link->irq_source_hpd_rx; in register_hpd_handlers()
3422 int_params.irq_source = in dce60_register_irq_handlers()
3425 c_irq_params = &adev->dm.vblank_params[int_params.irq_source - DC_IRQ_SOURCE_VBLANK1]; in dce60_register_irq_handlers()
3428 c_irq_params->irq_src = int_params.irq_source; in dce60_register_irq_handlers()
3444 int_params.irq_source = in dce60_register_irq_handlers()
3447 c_irq_params = &adev->dm.pflip_params[int_params.irq_source - DC_IRQ_SOURCE_PFLIP_FIRST]; in dce60_register_irq_handlers()
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Damdgpu_dm_helpers.c718 enum dc_irq_source irq_source; in dm_helpers_dmub_outbox_interrupt_control() local
721 irq_source = DC_IRQ_SOURCE_DMCUB_OUTBOX; in dm_helpers_dmub_outbox_interrupt_control()
723 ret = dc_interrupt_set(ctx->dc, irq_source, enable); in dm_helpers_dmub_outbox_interrupt_control()
/drivers/gpu/drm/amd/display/dc/
Dirq_types.h208 enum dc_irq_source irq_source; member
Ddc.h952 enum dc_irq_source irq_source; member
/drivers/gpu/drm/amd/display/dc/core/
Ddc_surface.c100 plane_state->irq_source = controller_id + DC_IRQ_SOURCE_PFLIP1 - 1; in enable_surface_flip_reporting()
/drivers/spi/
Dspi-bcm-qspi.c176 enum irq_source { enum
184 int irq_source; member
1210 .irq_source = MUXED_L1,
1445 if (qspi_irq_tab[val].irq_source == SINGLE_L2) { in bcm_qspi_probe()
/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dsmu_v13_0.c970 return amdgpu_irq_get(smu->adev, &smu->irq_source, 0); in smu_v13_0_enable_thermal_alert()
977 return amdgpu_irq_put(smu->adev, &smu->irq_source, 0); in smu_v13_0_disable_thermal_alert()
1348 struct amdgpu_irq_src *irq_src = &smu->irq_source; in smu_v13_0_register_irq_handler()
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dsmu_v11_0.c1043 ret = amdgpu_irq_get(smu->adev, &smu->irq_source, 0); in smu_v11_0_enable_thermal_alert()
1057 return amdgpu_irq_put(smu->adev, &smu->irq_source, 0); in smu_v11_0_disable_thermal_alert()
1516 struct amdgpu_irq_src *irq_src = &smu->irq_source; in smu_v11_0_register_irq_handler()
/drivers/gpu/drm/amd/pm/inc/
Damdgpu_smu.h479 struct amdgpu_irq_src irq_source; member