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Searched refs:lrca (Results 1 – 10 of 10) sorted by relevance

/drivers/gpu/drm/i915/gvt/
Dscheduler.c189 workload->engine->name, workload->ctx_desc.lrca, in populate_shadow_context()
200 (s->last_ctx[ring_id].lrca == in populate_shadow_context()
201 workload->ctx_desc.lrca) && in populate_shadow_context()
206 s->last_ctx[ring_id].lrca = workload->ctx_desc.lrca; in populate_shadow_context()
225 (u32)((workload->ctx_desc.lrca + i) << in populate_shadow_context()
952 workload->ctx_desc.lrca); in update_guest_context()
988 (u32)((workload->ctx_desc.lrca + i) << in update_guest_context()
1610 ((a)->lrca == (b)->lrca))
1640 (u32)((desc->lrca + 1) << I915_GTT_PAGE_SHIFT)); in intel_vgpu_create_workload()
1642 gvt_vgpu_err("invalid guest context LRCA: %x\n", desc->lrca); in intel_vgpu_create_workload()
Dexeclist.h52 u32 lrca : 20; member
Dexeclist.c46 ((a)->lrca == (b)->lrca))
Dgvt.h173 u32 lrca; member
Dgtt.c2392 if (s->last_ctx[i].lrca == (off >> info->gtt_entry_size_shift)) in intel_vgpu_emulate_ggtt_mmio_write()
/drivers/gpu/drm/i915/gt/
Dintel_context_types.h123 u32 lrca; member
Dintel_lrc.c944 ce->lrc.lrca = lrc_update_regs(ce, ce->engine, ce->ring->tail); in lrc_reset()
975 ce->lrc.lrca = lrc_update_regs(ce, engine, ce->ring->tail); in lrc_pin()
Dintel_execlists_submission.c461 ce->lrc.lrca = lrc_update_regs(ce, engine, head); in reset_active()
3017 ce->lrc.lrca = lrc_update_regs(ce, engine, head); in execlists_reset_active()
/drivers/gpu/drm/i915/gt/uc/
Dintel_guc_submission.c1349 desc->hw_context_desc = ce->lrc.lrca; in guc_lrc_desc_pin()
1417 (ce->lrc.lrca & CTX_GTT_ADDRESS_MASK)) in __guc_context_pin()
2967 drm_printf(p, "\tHW Context Desc: 0x%08x\n", ce->lrc.lrca); in intel_guc_submission_print_context_info()
/drivers/gpu/drm/i915/
Di915_perf.c1272 stream->specific_ctx_id = ce->lrc.lrca >> 12; in oa_get_render_ctx_id()