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Searched refs:max_fill_clk_mhz (Results 1 – 11 of 11) sorted by relevance

/drivers/gpu/drm/amd/display/dc/clk_mgr/dcn21/
Drn_clk_mgr.c474 …ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MA… in build_watermark_ranges()
489 …ranges->reader_wm_sets[num_valid_sets].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MA… in build_watermark_ranges()
492 …ranges->reader_wm_sets[num_valid_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINE… in build_watermark_ranges()
504 …ranges->reader_wm_sets[ranges->num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_… in build_watermark_ranges()
510 ranges->writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in build_watermark_ranges()
/drivers/gpu/drm/amd/display/dc/
Ddm_pp_smu.h78 uint16_t max_fill_clk_mhz; member
/drivers/gpu/drm/amd/display/amdgpu_dm/
Damdgpu_dm_pp_smu.c518 ranges->reader_wm_sets[i].max_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()
530 ranges->writer_wm_sets[i].max_fill_clk_mhz * 1000; in pp_rv_set_wm_ranges()
/drivers/gpu/drm/amd/display/dc/dcn301/
Ddcn301_resource.c1545 ranges.reader_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()
1554 ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16; in set_wm_ranges()
1560 …ranges.reader_wm_sets[ranges.num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UN… in set_wm_ranges()
1567 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in set_wm_ranges()
/drivers/gpu/drm/amd/display/dc/calcs/
Ddcn_calcs.c1578 ranges.reader_wm_sets[0].max_fill_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1581 ranges.writer_wm_sets[0].max_fill_clk_mhz = overdrive / 1000; in dcn_bw_notify_pplib_of_wm_ranges()
1590 ranges.reader_wm_sets[0].max_fill_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()
1593 ranges.writer_wm_sets[0].max_fill_clk_mhz = 5000; in dcn_bw_notify_pplib_of_wm_ranges()
/drivers/gpu/drm/amd/pm/swsmu/smu13/
Dyellow_carp_ppt.c534 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
544 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in yellow_carp_set_watermarks_table()
/drivers/gpu/drm/amd/pm/swsmu/smu12/
Drenoir_ppt.c1055 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
1067 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in renoir_set_watermarks_table()
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Dvangogh_ppt.c1583 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
1593 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in vangogh_set_watermarks_table()
Dnavi10_ppt.c1951 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
1961 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in navi10_set_watermarks_table()
Dsienna_cichlid_ppt.c1693 clock_ranges->reader_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
1703 clock_ranges->writer_wm_sets[i].max_fill_clk_mhz; in sienna_cichlid_set_watermarks_table()
/drivers/gpu/drm/amd/display/dc/dcn20/
Ddcn20_resource.c3882 ranges.reader_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()
3891 ranges.reader_wm_sets[i].max_fill_clk_mhz = loaded_bb->clock_limits[i].dram_speed_mts / 16; in dcn20_resource_construct()
3897 …ranges.reader_wm_sets[ranges.num_reader_wm_sets - 1].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UN… in dcn20_resource_construct()
3904 ranges.writer_wm_sets[0].max_fill_clk_mhz = PP_SMU_WM_SET_RANGE_CLK_UNCONSTRAINED_MAX; in dcn20_resource_construct()