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Searched refs:soc_table (Results 1 – 16 of 16) sorted by relevance

/drivers/gpu/drm/amd/pm/powerplay/hwmgr/
Dvega20_hwmgr.c643 dpm_table = &(data->dpm_table.soc_table); in vega20_setup_default_dpm_tables()
1880 min_freq = data->dpm_table.soc_table.dpm_state.soft_min_level; in vega20_upload_dpm_min_level()
1982 max_freq = data->dpm_table.soc_table.dpm_state.soft_max_level; in vega20_upload_dpm_max_level()
2398 soft_level = vega20_find_highest_dpm_level(&(data->dpm_table.soc_table)); in vega20_force_dpm_highest()
2400 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega20_force_dpm_highest()
2401 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega20_force_dpm_highest()
2402 data->dpm_table.soc_table.dpm_levels[soft_level].value; in vega20_force_dpm_highest()
2440 soft_level = vega20_find_lowest_dpm_level(&(data->dpm_table.soc_table)); in vega20_force_dpm_lowest()
2442 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega20_force_dpm_lowest()
2443 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega20_force_dpm_lowest()
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Dvega12_hwmgr.c645 dpm_table = &(data->dpm_table.soc_table); in vega12_setup_default_dpm_tables()
1194 min_freq = data->dpm_table.soc_table.dpm_state.soft_min_level; in vega12_upload_dpm_min_level()
1278 max_freq = data->dpm_table.soc_table.dpm_state.soft_max_level; in vega12_upload_dpm_max_level()
1702 struct vega12_single_dpm_table *soc_dpm_table = &(data->dpm_table.soc_table); in vega12_get_profiling_clk_mask()
1924 dpm_table = &(data->dpm_table.soc_table); in vega12_get_socclocks()
2047 if (soft_max_level >= data->dpm_table.soc_table.count) { in vega12_force_clock_level()
2050 data->dpm_table.soc_table.count - 1); in vega12_force_clock_level()
2054 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega12_force_clock_level()
2055 data->dpm_table.soc_table.dpm_levels[soft_min_level].value; in vega12_force_clock_level()
2056 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega12_force_clock_level()
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Dvega10_hwmgr.c1344 dpm_table = &(data->dpm_table.soc_table); in vega10_setup_default_dpm_tables()
1753 dpm_table = &(data->dpm_table.soc_table); in vega10_populate_all_graphic_levels()
3526 &(data->dpm_table.soc_table), in vega10_trim_dpm_states()
3638 data->dpm_table.soc_table.dpm_state.soft_min_level) { in vega10_upload_dpm_bootup_level()
3643 data->dpm_table.soc_table.dpm_state.soft_min_level = in vega10_upload_dpm_bootup_level()
3686 data->dpm_table.soc_table.dpm_state.soft_max_level) { in vega10_upload_dpm_max_level()
3691 data->dpm_table.soc_table.dpm_state.soft_max_level = in vega10_upload_dpm_max_level()
3722 vega10_find_lowest_dpm_level(&(data->dpm_table.soc_table)); in vega10_generate_dpm_level_enable_mask()
3724 vega10_find_highest_dpm_level(&(data->dpm_table.soc_table)); in vega10_generate_dpm_level_enable_mask()
3740 data->dpm_table.soc_table.dpm_levels[i].enabled = true; in vega10_generate_dpm_level_enable_mask()
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Dvega12_hwmgr.h126 struct vega12_single_dpm_table soc_table; member
Dvega10_hwmgr.h147 struct vega10_single_dpm_table soc_table; member
Dvega20_hwmgr.h178 struct vega20_single_dpm_table soc_table; member
/drivers/gpu/drm/amd/pm/swsmu/smu13/
Daldebaran_ppt.c299 dpm_table = &dpm_context->dpm_tables.soc_table; in aldebaran_set_default_dpm_table()
497 struct smu_13_0_dpm_table *soc_table = in aldebaran_populate_umd_state_clk() local
498 &dpm_context->dpm_tables.soc_table; in aldebaran_populate_umd_state_clk()
512 pstate_table->socclk_pstate.min = soc_table->min; in aldebaran_populate_umd_state_clk()
513 pstate_table->socclk_pstate.peak = soc_table->max; in aldebaran_populate_umd_state_clk()
514 pstate_table->socclk_pstate.curr.min = soc_table->min; in aldebaran_populate_umd_state_clk()
515 pstate_table->socclk_pstate.curr.max = soc_table->max; in aldebaran_populate_umd_state_clk()
519 soc_table->count > ALDEBARAN_UMD_PSTATE_SOCCLK_LEVEL) { in aldebaran_populate_umd_state_clk()
525 soc_table->dpm_levels[ALDEBARAN_UMD_PSTATE_SOCCLK_LEVEL].value; in aldebaran_populate_umd_state_clk()
834 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in aldebaran_print_clk_levels()
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Daldebaran_ppt.h60 struct aldebaran_single_dpm_table soc_table; member
Dsmu_v13_0.c1631 struct smu_13_0_dpm_table *soc_table = in smu_v13_0_set_performance_level() local
1632 &dpm_context->dpm_tables.soc_table; in smu_v13_0_set_performance_level()
1645 socclk_min = socclk_max = soc_table->max; in smu_v13_0_set_performance_level()
1650 socclk_min = socclk_max = soc_table->min; in smu_v13_0_set_performance_level()
1657 socclk_min = soc_table->min; in smu_v13_0_set_performance_level()
1658 socclk_max = soc_table->max; in smu_v13_0_set_performance_level()
/drivers/gpu/drm/amd/pm/swsmu/smu11/
Darcturus_ppt.h60 struct arcturus_single_dpm_table soc_table; member
Darcturus_ppt.c347 dpm_table = &dpm_context->dpm_tables.soc_table; in arcturus_set_default_dpm_table()
535 struct smu_11_0_dpm_table *soc_table = in arcturus_populate_umd_state_clk() local
536 &dpm_context->dpm_tables.soc_table; in arcturus_populate_umd_state_clk()
546 pstate_table->socclk_pstate.min = soc_table->min; in arcturus_populate_umd_state_clk()
547 pstate_table->socclk_pstate.peak = soc_table->max; in arcturus_populate_umd_state_clk()
551 soc_table->count > ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL) { in arcturus_populate_umd_state_clk()
557 soc_table->dpm_levels[ARCTURUS_UMD_PSTATE_SOCCLK_LEVEL].value; in arcturus_populate_umd_state_clk()
841 single_dpm_table = &(dpm_context->dpm_tables.soc_table); in arcturus_print_clk_levels()
990 freq = dpm_context->dpm_tables.soc_table.dpm_levels[level].value; in arcturus_upload_dpm_level()
Dsmu_v11_0.c1883 struct smu_11_0_dpm_table *soc_table = in smu_v11_0_set_performance_level() local
1884 &dpm_context->dpm_tables.soc_table; in smu_v11_0_set_performance_level()
1897 socclk_min = socclk_max = soc_table->max; in smu_v11_0_set_performance_level()
1902 socclk_min = socclk_max = soc_table->min; in smu_v11_0_set_performance_level()
1909 socclk_min = soc_table->min; in smu_v11_0_set_performance_level()
1910 socclk_max = soc_table->max; in smu_v11_0_set_performance_level()
Dnavi10_ppt.c986 dpm_table = &dpm_context->dpm_tables.soc_table; in navi10_set_default_dpm_table()
1507 struct smu_11_0_dpm_table *soc_table = in navi10_populate_umd_state_clk() local
1508 &dpm_context->dpm_tables.soc_table; in navi10_populate_umd_state_clk()
1566 pstate_table->socclk_pstate.min = soc_table->min; in navi10_populate_umd_state_clk()
1567 pstate_table->socclk_pstate.peak = soc_table->max; in navi10_populate_umd_state_clk()
1571 soc_table->max > NAVI10_UMD_PSTATE_PROFILING_SOCCLK) { in navi10_populate_umd_state_clk()
Dsienna_cichlid_ppt.c724 dpm_table = &dpm_context->dpm_tables.soc_table; in sienna_cichlid_set_default_dpm_table()
1324 struct smu_11_0_dpm_table *soc_table = in sienna_cichlid_populate_umd_state_clk() local
1325 &dpm_context->dpm_tables.soc_table; in sienna_cichlid_populate_umd_state_clk()
1336 pstate_table->socclk_pstate.min = soc_table->min; in sienna_cichlid_populate_umd_state_clk()
1337 pstate_table->socclk_pstate.peak = soc_table->max; in sienna_cichlid_populate_umd_state_clk()
/drivers/gpu/drm/amd/pm/inc/
Dsmu_v13_0.h82 struct smu_13_0_dpm_table soc_table; member
Dsmu_v11_0.h104 struct smu_11_0_dpm_table soc_table; member