| /drivers/most/ |
| D | core.c | 102 struct most_channel *c = mbo->context; in most_free_mbo_coherent() local
103 u16 const coherent_buf_size = c->cfg.buffer_size + c->cfg.extra_len; in most_free_mbo_coherent()
105 if (c->iface->dma_free) in most_free_mbo_coherent()
106 c->iface->dma_free(mbo, coherent_buf_size); in most_free_mbo_coherent()
110 if (atomic_sub_and_test(1, &c->mbo_ref)) in most_free_mbo_coherent()
111 complete(&c->cleanup); in most_free_mbo_coherent()
118 static void flush_channel_fifos(struct most_channel *c) in flush_channel_fifos() argument
123 if (list_empty(&c->fifo) && list_empty(&c->halt_fifo)) in flush_channel_fifos()
126 spin_lock_irqsave(&c->fifo_lock, flags); in flush_channel_fifos()
127 list_for_each_entry_safe(mbo, tmp, &c->fifo, list) { in flush_channel_fifos()
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| D | most_cdev.c | 50 static inline bool ch_has_mbo(struct comp_channel *c) in ch_has_mbo() argument
52 return channel_has_mbo(c->iface, c->channel_id, &comp.cc) > 0; in ch_has_mbo()
55 static inline struct mbo *ch_get_mbo(struct comp_channel *c, struct mbo **mbo) in ch_get_mbo() argument
57 if (!kfifo_peek(&c->fifo, mbo)) { in ch_get_mbo()
58 *mbo = most_get_mbo(c->iface, c->channel_id, &comp.cc); in ch_get_mbo()
60 kfifo_in(&c->fifo, mbo, 1); in ch_get_mbo()
67 struct comp_channel *c, *tmp; in get_channel() local
71 list_for_each_entry_safe(c, tmp, &channel_list, list) { in get_channel()
72 if ((c->iface == iface) && (c->channel_id == id)) { in get_channel()
74 return c; in get_channel()
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| /drivers/scsi/ |
| D | atp870u.c | 44 static void send_s870(struct atp_unit *dev,unsigned char c);
45 static void atp_is(struct atp_unit *dev, unsigned char c, bool wide_chip,
123 unsigned char i, j, c, target_id, lun,cmdp; in atp870u_intr_handle() local
133 for (c = 0; c < 2; c++) { in atp870u_intr_handle()
134 j = atp_readb_io(dev, c, 0x1f); in atp870u_intr_handle()
137 dev->in_int[c] = 0; in atp870u_intr_handle()
144 dev->in_int[c] = 1; in atp870u_intr_handle()
145 cmdp = atp_readb_io(dev, c, 0x10); in atp870u_intr_handle()
146 if (dev->working[c] != 0) { in atp870u_intr_handle()
148 if ((atp_readb_io(dev, c, 0x16) & 0x80) == 0) in atp870u_intr_handle()
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| /drivers/media/firewire/ |
| D | firedtv-avc.c | 90 static inline void clear_operands(struct avc_command_frame *c, int from, int to) in clear_operands() argument
92 memset(&c->operand[from], 0, to - from + 1); in clear_operands()
95 static void pad_operands(struct avc_command_frame *c, int from) in pad_operands() argument
100 clear_operands(c, from, to); in pad_operands()
336 struct avc_command_frame *c = (void *)fdtv->avc_data; in avc_tuner_tuneqpsk() local
338 c->opcode = AVC_OPCODE_VENDOR; in avc_tuner_tuneqpsk()
340 c->operand[0] = SFE_VENDOR_DE_COMPANYID_0; in avc_tuner_tuneqpsk()
341 c->operand[1] = SFE_VENDOR_DE_COMPANYID_1; in avc_tuner_tuneqpsk()
342 c->operand[2] = SFE_VENDOR_DE_COMPANYID_2; in avc_tuner_tuneqpsk()
344 c->operand[3] = SFE_VENDOR_OPCODE_TUNE_QPSK2; in avc_tuner_tuneqpsk()
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| /drivers/iommu/ |
| D | msm_iommu_hw-8xxx.h | 25 #define GET_CONTEXT_FIELD(b, c, r, F) \ argument
26 GET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT)
30 #define SET_CONTEXT_FIELD(b, c, r, F, v) \ argument
31 SET_FIELD(((b) + (r) + ((c) << CTX_SHIFT)), F##_MASK, F##_SHIFT, (v))
121 #define SET_SCTLR(b, c, v) SET_CTX_REG(SCTLR, (b), (c), (v)) argument
122 #define SET_ACTLR(b, c, v) SET_CTX_REG(ACTLR, (b), (c), (v)) argument
123 #define SET_CONTEXTIDR(b, c, v) SET_CTX_REG(CONTEXTIDR, (b), (c), (v)) argument
124 #define SET_TTBR0(b, c, v) SET_CTX_REG(TTBR0, (b), (c), (v)) argument
125 #define SET_TTBR1(b, c, v) SET_CTX_REG(TTBR1, (b), (c), (v)) argument
126 #define SET_TTBCR(b, c, v) SET_CTX_REG(TTBCR, (b), (c), (v)) argument
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| /drivers/dma/mediatek/ |
| D | mtk-uart-apdma.c | 109 static inline struct mtk_chan *to_mtk_uart_apdma_chan(struct dma_chan *c) in to_mtk_uart_apdma_chan() argument
111 return container_of(c, struct mtk_chan, vc.chan); in to_mtk_uart_apdma_chan()
120 static void mtk_uart_apdma_write(struct mtk_chan *c, in mtk_uart_apdma_write() argument
123 writel(val, c->base + reg); in mtk_uart_apdma_write()
126 static unsigned int mtk_uart_apdma_read(struct mtk_chan *c, unsigned int reg) in mtk_uart_apdma_read() argument
128 return readl(c->base + reg); in mtk_uart_apdma_read()
136 static void mtk_uart_apdma_start_tx(struct mtk_chan *c) in mtk_uart_apdma_start_tx() argument
139 to_mtk_uart_apdma_dev(c->vc.chan.device); in mtk_uart_apdma_start_tx()
140 struct mtk_uart_apdma_desc *d = c->desc; in mtk_uart_apdma_start_tx()
143 vff_sz = c->cfg.dst_port_window_size; in mtk_uart_apdma_start_tx()
[all …]
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| /drivers/net/ethernet/chelsio/cxgb4/ |
| D | cxgb4_ptp.c | 130 struct fw_ptp_cmd c; in cxgb4_ptprx_timestamping() local
133 memset(&c, 0, sizeof(c)); in cxgb4_ptprx_timestamping()
134 c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) | in cxgb4_ptprx_timestamping()
138 c.retval_len16 = cpu_to_be32(FW_CMD_LEN16_V(sizeof(c) / 16)); in cxgb4_ptprx_timestamping()
139 c.u.init.sc = FW_PTP_SC_RXTIME_STAMP; in cxgb4_ptprx_timestamping()
140 c.u.init.mode = cpu_to_be16(mode); in cxgb4_ptprx_timestamping()
142 err = t4_wr_mbox(adapter, adapter->mbox, &c, sizeof(c), NULL); in cxgb4_ptprx_timestamping()
151 struct fw_ptp_cmd c; in cxgb4_ptp_txtype() local
154 memset(&c, 0, sizeof(c)); in cxgb4_ptp_txtype()
155 c.op_to_portid = cpu_to_be32(FW_CMD_OP_V(FW_PTP_CMD) | in cxgb4_ptp_txtype()
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| /drivers/mtd/nand/onenand/ |
| D | onenand_omap2.c | 52 struct omap2_onenand *c = dev_id; in omap2_onenand_interrupt() local
54 complete(&c->irq_done); in omap2_onenand_interrupt()
59 static inline unsigned short read_reg(struct omap2_onenand *c, int reg) in read_reg() argument
61 return readw(c->onenand.base + reg); in read_reg()
64 static inline void write_reg(struct omap2_onenand *c, unsigned short value, in write_reg() argument
67 writew(value, c->onenand.base + reg); in write_reg()
70 static int omap2_onenand_set_cfg(struct omap2_onenand *c, in omap2_onenand_set_cfg() argument
106 write_reg(c, reg, ONENAND_REG_SYS_CFG1); in omap2_onenand_set_cfg()
144 struct omap2_onenand *c = container_of(mtd, struct omap2_onenand, mtd); in omap2_onenand_wait() local
170 intr = read_reg(c, ONENAND_REG_INTERRUPT); in omap2_onenand_wait()
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| /drivers/md/ |
| D | dm-bufio.c | 357 struct dm_bufio_client *c; member
1025 static void dm_bufio_lock(struct dm_bufio_client *c) in dm_bufio_lock() argument
1027 if (static_branch_unlikely(&no_sleep_enabled) && c->no_sleep) in dm_bufio_lock()
1028 spin_lock_bh(&c->spinlock); in dm_bufio_lock()
1030 mutex_lock_nested(&c->lock, dm_bufio_in_request()); in dm_bufio_lock()
1033 static void dm_bufio_unlock(struct dm_bufio_client *c) in dm_bufio_unlock() argument
1035 if (static_branch_unlikely(&no_sleep_enabled) && c->no_sleep) in dm_bufio_unlock()
1036 spin_unlock_bh(&c->spinlock); in dm_bufio_unlock()
1038 mutex_unlock(&c->lock); in dm_bufio_unlock()
1116 diff = (long)b->c->block_size; in adjust_total_allocated()
[all …]
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| /drivers/net/ethernet/mellanox/mlx5/core/en/xsk/ |
| D | setup.c | 61 static int mlx5e_init_xsk_rq(struct mlx5e_channel *c, in mlx5e_init_xsk_rq() argument
67 struct mlx5_core_dev *mdev = c->mdev; in mlx5e_init_xsk_rq()
72 rq->pdev = c->pdev; in mlx5e_init_xsk_rq()
73 rq->netdev = c->netdev; in mlx5e_init_xsk_rq()
74 rq->priv = c->priv; in mlx5e_init_xsk_rq()
75 rq->tstamp = c->tstamp; in mlx5e_init_xsk_rq()
77 rq->icosq = &c->icosq; in mlx5e_init_xsk_rq()
78 rq->ix = c->ix; in mlx5e_init_xsk_rq()
79 rq->channel = c; in mlx5e_init_xsk_rq()
82 rq->xdpsq = &c->rq_xdpsq; in mlx5e_init_xsk_rq()
[all …]
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| /drivers/gpu/drm/msm/disp/dpu1/ |
| D | dpu_hw_pingpong.c | 48 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_setup_dither() local
51 c = &pp->hw; in dpu_hw_pp_setup_dither()
54 DPU_REG_WRITE(c, base + PP_DITHER_EN, 0); in dpu_hw_pp_setup_dither()
64 DPU_REG_WRITE(c, base + PP_DITHER_BITDEPTH, data); in dpu_hw_pp_setup_dither()
71 DPU_REG_WRITE(c, base + PP_DITHER_MATRIX + i, data); in dpu_hw_pp_setup_dither()
73 DPU_REG_WRITE(c, base + PP_DITHER_EN, 1); in dpu_hw_pp_setup_dither()
79 struct dpu_hw_blk_reg_map *c; in dpu_hw_pp_enable_te() local
84 c = &pp->hw; in dpu_hw_pp_enable_te()
92 DPU_REG_WRITE(c, PP_SYNC_CONFIG_VSYNC, cfg); in dpu_hw_pp_enable_te()
93 DPU_REG_WRITE(c, PP_SYNC_CONFIG_HEIGHT, te->sync_cfg_height); in dpu_hw_pp_enable_te()
[all …]
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| D | dpu_hw_intf.c | 101 struct dpu_hw_blk_reg_map *c = &ctx->hw; in dpu_hw_intf_setup_timing_engine() local
117 intf_cfg = DPU_REG_READ(c, INTF_CONFIG); in dpu_hw_intf_setup_timing_engine()
207 DPU_REG_WRITE(c, INTF_HSYNC_CTL, hsync_ctl); in dpu_hw_intf_setup_timing_engine()
208 DPU_REG_WRITE(c, INTF_VSYNC_PERIOD_F0, vsync_period * hsync_period); in dpu_hw_intf_setup_timing_engine()
209 DPU_REG_WRITE(c, INTF_VSYNC_PULSE_WIDTH_F0, in dpu_hw_intf_setup_timing_engine()
211 DPU_REG_WRITE(c, INTF_DISPLAY_HCTL, display_hctl); in dpu_hw_intf_setup_timing_engine()
212 DPU_REG_WRITE(c, INTF_DISPLAY_V_START_F0, display_v_start); in dpu_hw_intf_setup_timing_engine()
213 DPU_REG_WRITE(c, INTF_DISPLAY_V_END_F0, display_v_end); in dpu_hw_intf_setup_timing_engine()
214 DPU_REG_WRITE(c, INTF_ACTIVE_HCTL, active_hctl); in dpu_hw_intf_setup_timing_engine()
215 DPU_REG_WRITE(c, INTF_ACTIVE_V_START_F0, active_v_start); in dpu_hw_intf_setup_timing_engine()
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| /drivers/mmc/core/ |
| D | card.h | 15 #define mmc_card_name(c) ((c)->cid.prod_name) argument
16 #define mmc_card_id(c) (dev_name(&(c)->dev)) argument
27 #define mmc_card_present(c) ((c)->state & MMC_STATE_PRESENT) argument
28 #define mmc_card_readonly(c) ((c)->state & MMC_STATE_READONLY) argument
29 #define mmc_card_blockaddr(c) ((c)->state & MMC_STATE_BLOCKADDR) argument
30 #define mmc_card_ext_capacity(c) ((c)->state & MMC_CARD_SDXC) argument
31 #define mmc_card_removed(c) ((c) && ((c)->state & MMC_CARD_REMOVED)) argument
32 #define mmc_card_suspended(c) ((c)->state & MMC_STATE_SUSPENDED) argument
34 #define mmc_card_set_present(c) ((c)->state |= MMC_STATE_PRESENT) argument
35 #define mmc_card_set_readonly(c) ((c)->state |= MMC_STATE_READONLY) argument
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| /drivers/media/common/siano/ |
| D | smsdvb-main.c | 121 struct dtv_frontend_properties *c = &fe->dtv_property_cache; in smsdvb_stats_not_ready() local
134 c->strength.len = 1; in smsdvb_stats_not_ready()
135 c->cnr.len = 1; in smsdvb_stats_not_ready()
136 c->strength.stat[0].scale = FE_SCALE_DECIBEL; in smsdvb_stats_not_ready()
137 c->cnr.stat[0].scale = FE_SCALE_DECIBEL; in smsdvb_stats_not_ready()
140 c->post_bit_error.len = n_layers; in smsdvb_stats_not_ready()
141 c->post_bit_count.len = n_layers; in smsdvb_stats_not_ready()
142 c->block_error.len = n_layers; in smsdvb_stats_not_ready()
143 c->block_count.len = n_layers; in smsdvb_stats_not_ready()
150 c->post_bit_error.stat[i].scale = FE_SCALE_NOT_AVAILABLE; in smsdvb_stats_not_ready()
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| /drivers/md/bcache/ |
| D | btree.c | 99 #define PTR_HASH(c, k) \ argument
100 (((k)->ptr[0] >> c->bucket_bits) | PTR_GEN(k, 0))
109 return ((void *) btree_bset_first(b)) + b->written * block_bytes(b->c->cache); in write_block()
116 bch_btree_sort(&b->keys, &b->c->sort); in bch_btree_init_next()
118 bch_btree_sort_lazy(&b->keys, &b->c->sort); in bch_btree_init_next()
122 bset_magic(&b->c->cache->sb)); in bch_btree_init_next()
128 void bkey_put(struct cache_set *c, struct bkey *k) in bkey_put() argument
133 if (ptr_available(c, k, i)) in bkey_put()
134 atomic_dec_bug(&PTR_BUCKET(c, k, i)->pin); in bkey_put()
159 iter = mempool_alloc(&b->c->fill_iter, GFP_NOIO); in bch_btree_node_read_done()
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| D | super.c | 368 struct cache_set *c = container_of(cl, struct cache_set, sb_write); in bcache_write_super_unlock() local
370 up(&c->sb_write_mutex); in bcache_write_super_unlock()
373 void bcache_write_super(struct cache_set *c) in bcache_write_super() argument
375 struct closure *cl = &c->sb_write; in bcache_write_super()
376 struct cache *ca = c->cache; in bcache_write_super()
380 down(&c->sb_write_mutex); in bcache_write_super()
381 closure_init(cl, &c->cl); in bcache_write_super()
403 struct cache_set *c = container_of(cl, struct cache_set, uuid_write); in uuid_endio() local
405 cache_set_err_on(bio->bi_status, c, "accessing uuids"); in uuid_endio()
406 bch_bbio_free(bio, c); in uuid_endio()
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| D | journal.c | 170 int bch_journal_read(struct cache_set *c, struct list_head *list) in bch_journal_read() argument
181 struct cache *ca = c->cache; in bch_journal_read()
285 c->journal.seq = list_entry(list->prev, in bch_journal_read()
293 void bch_journal_mark(struct cache_set *c, struct list_head *list) in bch_journal_mark() argument
298 struct journal *j = &c->journal; in bch_journal_mark()
327 if (!__bch_extent_invalid(c, k)) { in bch_journal_mark()
331 if (ptr_available(c, k, j)) in bch_journal_mark()
332 atomic_inc(&PTR_BUCKET(c, k, j)->pin); in bch_journal_mark()
334 bch_initial_mark_key(c, 0, k); in bch_journal_mark()
416 static void btree_flush_write(struct cache_set *c) in btree_flush_write() argument
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| /drivers/video/console/ |
| D | vgacon.c | 68 static int vgacon_set_origin(struct vc_data *c);
132 static inline void vga_set_mem_top(struct vc_data *c) in vga_set_mem_top() argument
134 write_vga(12, (c->vc_visible_origin - vga_vram_base) / 2); in vga_set_mem_top()
137 static void vgacon_scrolldelta(struct vc_data *c, int lines) in vgacon_scrolldelta() argument
139 vc_scrolldelta_helper(c, lines, vga_rolled_over, (void *)vga_vram_base, in vgacon_scrolldelta()
141 vga_set_mem_top(c); in vgacon_scrolldelta()
144 static void vgacon_restore_screen(struct vc_data *c) in vgacon_restore_screen() argument
146 if (c->vc_origin != c->vc_visible_origin) in vgacon_restore_screen()
147 vgacon_scrolldelta(c, 0); in vgacon_restore_screen()
335 static void vgacon_init(struct vc_data *c, int init) in vgacon_init() argument
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| /drivers/staging/media/av7110/ |
| D | av7110_ipack.c | 149 int c = 0; in av7110_ipack_instant_repack() local
151 while (c < count && (p->mpeg == 0 || in av7110_ipack_instant_repack()
158 if (buf[c] == 0x00) in av7110_ipack_instant_repack()
162 c++; in av7110_ipack_instant_repack()
165 if (buf[c] == 0x01) in av7110_ipack_instant_repack()
167 else if (buf[c] == 0) in av7110_ipack_instant_repack()
171 c++; in av7110_ipack_instant_repack()
175 switch (buf[c]) { in av7110_ipack_instant_repack()
190 p->cid = buf[c]; in av7110_ipack_instant_repack()
191 c++; in av7110_ipack_instant_repack()
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| /drivers/media/platform/mediatek/mdp3/ |
| D | mtk-mdp3-regs.h | 26 #define MDP_COLOR_IS_COMPRESS(c) ((0x20000000 & (c)) >> 29) argument
27 #define MDP_COLOR_IS_10BIT_PACKED(c) ((0x08000000 & (c)) >> 27) argument
28 #define MDP_COLOR_IS_10BIT_LOOSE(c) (((0x0c000000 & (c)) >> 26) == 1) argument
29 #define MDP_COLOR_IS_10BIT_TILE(c) (((0x0c000000 & (c)) >> 26) == 3) argument
30 #define MDP_COLOR_IS_UFP(c) ((0x02000000 & (c)) >> 25) argument
31 #define MDP_COLOR_IS_INTERLACED(c) ((0x01000000 & (c)) >> 24) argument
32 #define MDP_COLOR_IS_BLOCK_MODE(c) ((0x00800000 & (c)) >> 23) argument
33 #define MDP_COLOR_GET_PLANE_COUNT(c) ((0x00600000 & (c)) >> 21) argument
34 #define MDP_COLOR_GET_H_SUBSAMPLE(c) ((0x00180000 & (c)) >> 19) argument
35 #define MDP_COLOR_GET_V_SUBSAMPLE(c) ((0x00040000 & (c)) >> 18) argument
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| /drivers/net/ethernet/mellanox/mlx5/core/en/ |
| D | ptp.c | 264 struct mlx5e_ptp *c = container_of(napi, struct mlx5e_ptp, napi); in mlx5e_ptp_napi_poll() local
265 struct mlx5e_ch_stats *ch_stats = c->stats; in mlx5e_ptp_napi_poll()
266 struct mlx5e_rq *rq = &c->rq; in mlx5e_ptp_napi_poll()
275 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) { in mlx5e_ptp_napi_poll()
276 for (i = 0; i < c->num_tc; i++) { in mlx5e_ptp_napi_poll()
277 busy |= mlx5e_poll_tx_cq(&c->ptpsq[i].txqsq.cq, budget); in mlx5e_ptp_napi_poll()
278 busy |= mlx5e_ptp_poll_ts_cq(&c->ptpsq[i].ts_cq, budget); in mlx5e_ptp_napi_poll()
281 if (test_bit(MLX5E_PTP_STATE_RX, c->state) && likely(budget)) { in mlx5e_ptp_napi_poll()
300 if (test_bit(MLX5E_PTP_STATE_TX, c->state)) { in mlx5e_ptp_napi_poll()
301 for (i = 0; i < c->num_tc; i++) { in mlx5e_ptp_napi_poll()
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| /drivers/platform/surface/aggregator/ |
| D | core.c | 127 int ssam_client_link(struct ssam_controller *c, struct device *client) in ssam_client_link() argument
133 ssam_controller_statelock(c); in ssam_client_link()
135 if (c->state != SSAM_CONTROLLER_STARTED) { in ssam_client_link()
136 ssam_controller_stateunlock(c); in ssam_client_link()
140 ctrldev = ssam_controller_device(c); in ssam_client_link()
142 ssam_controller_stateunlock(c); in ssam_client_link()
148 ssam_controller_stateunlock(c); in ssam_client_link()
159 ssam_controller_stateunlock(c); in ssam_client_link()
163 ssam_controller_stateunlock(c); in ssam_client_link()
205 struct ssam_controller *c; in ssam_client_bind() local
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| /drivers/dma/ti/ |
| D | omap-dma.c | 238 static inline struct omap_chan *to_omap_dma_chan(struct dma_chan *c) in to_omap_dma_chan() argument
240 return container_of(c, struct omap_chan, vc.chan); in to_omap_dma_chan()
369 static void omap_dma_chan_write(struct omap_chan *c, unsigned reg, unsigned val) in omap_dma_chan_write() argument
371 const struct omap_dma_reg *r = c->reg_map + reg; in omap_dma_chan_write()
373 omap_dma_write(val, r->type, c->channel_base + r->offset); in omap_dma_chan_write()
376 static unsigned omap_dma_chan_read(struct omap_chan *c, unsigned reg) in omap_dma_chan_read() argument
378 const struct omap_dma_reg *r = c->reg_map + reg; in omap_dma_chan_read()
380 return omap_dma_read(r->type, c->channel_base + r->offset); in omap_dma_chan_read()
383 static void omap_dma_clear_csr(struct omap_chan *c) in omap_dma_clear_csr() argument
386 omap_dma_chan_read(c, CSR); in omap_dma_clear_csr()
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| /drivers/dma/lgm/ |
| D | lgm-dma.c | 305 static inline bool ldma_chan_tx(struct ldma_chan *c) in ldma_chan_tx() argument
307 return !!(c->flags & DMA_TX_CH); in ldma_chan_tx()
310 static inline bool ldma_chan_is_hw_desc(struct ldma_chan *c) in ldma_chan_is_hw_desc() argument
312 return !!(c->flags & DMA_HW_DESC); in ldma_chan_is_hw_desc()
519 static int ldma_chan_cctrl_cfg(struct ldma_chan *c, u32 val) in ldma_chan_cctrl_cfg() argument
521 struct ldma_dev *d = to_ldma_dev(c->vchan.chan.device); in ldma_chan_cctrl_cfg()
527 ldma_update_bits(d, DMA_CS_MASK, c->nr, DMA_CS); in ldma_chan_cctrl_cfg()
531 c->flags |= DMA_TX_CH; in ldma_chan_cctrl_cfg()
533 c->flags |= DMA_RX_CH; in ldma_chan_cctrl_cfg()
548 static void ldma_chan_irq_init(struct ldma_chan *c) in ldma_chan_irq_init() argument
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| /drivers/gpu/drm/arm/display/komeda/ |
| D | komeda_pipeline.c | 49 struct komeda_component *c; in komeda_pipeline_destroy() local
54 c = komeda_pipeline_get_component(pipe, i); in komeda_pipeline_destroy()
55 komeda_component_destroy(mdev, c); in komeda_pipeline_destroy()
129 struct komeda_component *c = NULL; in komeda_pipeline_get_component() local
133 c = *pos; in komeda_pipeline_get_component()
135 return c; in komeda_pipeline_get_component()
142 struct komeda_component *c = NULL; in komeda_pipeline_get_first_component() local
148 c = komeda_pipeline_get_component(pipe, id); in komeda_pipeline_get_first_component()
150 return c; in komeda_pipeline_get_first_component()
154 komeda_component_pickup_input(struct komeda_component *c, u32 avail_comps) in komeda_component_pickup_input() argument
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