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/kernel/linux/linux-5.10/drivers/i2c/busses/
Di2c-jz4780.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4780 I2C bus driver
5 * Copyright (C) 2006 - 2009 Ingenic Semiconductor Inc.
15 #include <linux/i2c.h>
27 #define JZ4780_I2C_CTRL 0x00
28 #define JZ4780_I2C_TAR 0x04
29 #define JZ4780_I2C_SAR 0x08
30 #define JZ4780_I2C_DC 0x10
31 #define JZ4780_I2C_SHCNT 0x14
32 #define JZ4780_I2C_SLCNT 0x18
[all …]
Di2c-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C adapter for the PXA I2C bus access.
8 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
13 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
14 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
24 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-pxa.h>
37 /* I2C register field definitions */
38 #define IBMR_SDAS (1 << 0)
41 #define ICR_START (1 << 0) /* start bit */
[all …]
Di2c-zx2967.c1 // SPDX-License-Identifier: GPL-2.0-only
10 #include <linux/i2c.h>
16 #define REG_CMD 0x04
17 #define REG_DEVADDR_H 0x0C
18 #define REG_DEVADDR_L 0x10
19 #define REG_CLK_DIV_FS 0x14
20 #define REG_CLK_DIV_HS 0x18
21 #define REG_WRCONF 0x1C
22 #define REG_RDCONF 0x20
23 #define REG_DATA 0x24
[all …]
Di2c-img-scb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C adapter for the IMG Serial Control Bus (SCB) IP block.
7 * There are three ways that this I2C controller can be driven:
9 * - Raw control of the SDA and SCK signals.
15 * - Atomic commands. A low level I2C symbol (such as generate
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
21 * state machine in the interrupt handler to compose/react to I2C
26 * in suboptimal use of the bus, with gaps between the I2C symbols while
29 * - Automatic mode. A bus address, and whether to read/write is
30 * specified, and the hardware takes care of the I2C state machine,
[all …]
Di2c-digicolor.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C bus driver for Conexant Digicolor SoCs
13 #include <linux/i2c.h>
23 #define II_CONTROL 0x0
24 #define II_CONTROL_LOCAL_RESET BIT(0)
26 #define II_CLOCKTIME 0x1
28 #define II_COMMAND 0x2
37 #define II_CMD_STATUS_NORMAL 0
42 #define II_DATA 0x3
43 #define II_INTFLAG_CLEAR 0x8
[all …]
Di2c-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C bus driver for Amlogic Meson SoCs
11 #include <linux/i2c.h>
22 /* Meson I2C register map */
23 #define REG_CTRL 0x00
24 #define REG_SLAVE_ADDR 0x04
25 #define REG_TOK_LIST0 0x08
26 #define REG_TOK_LIST1 0x0c
27 #define REG_TOK_WDATA0 0x10
28 #define REG_TOK_WDATA1 0x14
[all …]
Di2c-mt65xx.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
14 #include <linux/i2c.h>
33 #define I2C_TRANSAC_COMP (1 << 0)
34 #define I2C_TRANSAC_START (1 << 0)
37 #define I2C_DCM_DISABLE 0x0000
38 #define I2C_IO_CONFIG_OPEN_DRAIN 0x0003
39 #define I2C_IO_CONFIG_PUSH_PULL 0x0000
40 #define I2C_SOFT_RST 0x0001
41 #define I2C_HANDSHAKE_RST 0x0020
[all …]
Di2c-lpc2k.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Code portions referenced from the i2x-pxa and i2c-pnx drivers
17 #include <linux/i2c.h>
29 #define LPC24XX_I2CONSET 0x00
30 #define LPC24XX_I2STAT 0x04
31 #define LPC24XX_I2DAT 0x08
32 #define LPC24XX_I2ADDR 0x0c
33 #define LPC24XX_I2SCLH 0x10
34 #define LPC24XX_I2SCLL 0x14
35 #define LPC24XX_I2CONCLR 0x18
[all …]
Di2c-s3c2410.c1 // SPDX-License-Identifier: GPL-2.0-or-later
2 /* linux/drivers/i2c/busses/i2c-s3c2410.c
7 * S3C2410 I2C Controller
13 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-s3c2410.h>
38 #define S3C2410_IICCON 0x00
39 #define S3C2410_IICSTAT 0x04
40 #define S3C2410_IICADD 0x08
41 #define S3C2410_IICDS 0x0C
42 #define S3C2440_IICLC 0x10
[all …]
Di2c-xiic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-xiic.c
4 * Copyright (c) 2002-2007 Xilinx Inc.
5 * Copyright (c) 2009-2010 Intel Corporation
24 #include <linux/i2c.h>
27 #include <linux/platform_data/i2c-xiic.h>
34 #define DRIVER_NAME "xiic-i2c"
48 * struct xiic_i2c - Internal representation of the XIIC I2C bus
59 * @endianness: big/little-endian byte order
60 * @clk: Pointer to AXI4-lite input clock
[all …]
Di2c-synquacer.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/i2c.h>
25 /* I2C register address definitions */
26 #define SYNQUACER_I2C_REG_BSR (0x00 << 2) // Bus Status
27 #define SYNQUACER_I2C_REG_BCR (0x01 << 2) // Bus Control
28 #define SYNQUACER_I2C_REG_CCR (0x02 << 2) // Clock Control
29 #define SYNQUACER_I2C_REG_ADR (0x03 << 2) // Address
30 #define SYNQUACER_I2C_REG_DAR (0x04 << 2) // Data
31 #define SYNQUACER_I2C_REG_CSR (0x05 << 2) // Expansion CS
32 #define SYNQUACER_I2C_REG_FSR (0x06 << 2) // Bus Clock Freq
[all …]
Di2c-exynos5.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-exynos5.c - Samsung Exynos5 I2C Controller Driver
11 #include <linux/i2c.h>
39 #define HSI2C_CTL 0x00
40 #define HSI2C_FIFO_CTL 0x04
41 #define HSI2C_TRAILIG_CTL 0x08
42 #define HSI2C_CLK_CTL 0x0C
43 #define HSI2C_CLK_SLOT 0x10
44 #define HSI2C_INT_ENABLE 0x20
45 #define HSI2C_INT_STATUS 0x24
[all …]
/kernel/linux/linux-6.6/drivers/i2c/busses/
Di2c-jz4780.c1 // SPDX-License-Identifier: GPL-2.0-or-later
3 * Ingenic JZ4780 I2C bus driver
5 * Copyright (C) 2006 - 2009 Ingenic Semiconductor Inc.
15 #include <linux/i2c.h>
27 #define JZ4780_I2C_CTRL 0x00
28 #define JZ4780_I2C_TAR 0x04
29 #define JZ4780_I2C_SAR 0x08
30 #define JZ4780_I2C_DC 0x10
31 #define JZ4780_I2C_SHCNT 0x14
32 #define JZ4780_I2C_SLCNT 0x18
[all …]
Di2c-pxa.c1 // SPDX-License-Identifier: GPL-2.0-only
5 * I2C adapter for the PXA I2C bus access.
8 * Copyright (C) 2004-2005 Deep Blue Solutions Ltd.
13 * Jan 2003: Fixed several bugs concerning interrupt handling [Kai-Uwe Bloem]
14 * Jan 2003: added limited signal handling [Kai-Uwe Bloem]
24 #include <linux/i2c.h>
34 #include <linux/platform_data/i2c-pxa.h>
37 /* I2C register field definitions */
38 #define IBMR_SDAS (1 << 0)
41 #define ICR_START (1 << 0) /* start bit */
[all …]
Di2c-mt65xx.c1 // SPDX-License-Identifier: GPL-2.0-only
11 #include <linux/dma-mapping.h>
14 #include <linux/i2c.h>
32 #define I2C_TRANSAC_COMP (1 << 0)
33 #define I2C_TRANSAC_START (1 << 0)
36 #define I2C_DCM_DISABLE 0x0000
37 #define I2C_IO_CONFIG_OPEN_DRAIN 0x0003
38 #define I2C_IO_CONFIG_PUSH_PULL 0x0000
39 #define I2C_SOFT_RST 0x0001
40 #define I2C_HANDSHAKE_RST 0x0020
[all …]
Di2c-xiic.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * i2c-xiic.c
4 * Copyright (c) 2002-2007 Xilinx Inc.
5 * Copyright (c) 2009-2010 Intel Corporation
24 #include <linux/i2c.h>
27 #include <linux/platform_data/i2c-xiic.h>
34 #define DRIVER_NAME "xiic-i2c"
35 #define DYNAMIC_MODE_READ_BROKEN_BIT BIT(0)
50 REG_VALUES_100KHZ = 0,
56 * struct xiic_i2c - Internal representation of the XIIC I2C bus
[all …]
Di2c-img-scb.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C adapter for the IMG Serial Control Bus (SCB) IP block.
7 * There are three ways that this I2C controller can be driven:
9 * - Raw control of the SDA and SCK signals.
15 * - Atomic commands. A low level I2C symbol (such as generate
20 * This mode of operation is used by MODE_ATOMIC, which uses an I2C
21 * state machine in the interrupt handler to compose/react to I2C
26 * in suboptimal use of the bus, with gaps between the I2C symbols while
29 * - Automatic mode. A bus address, and whether to read/write is
30 * specified, and the hardware takes care of the I2C state machine,
[all …]
Di2c-digicolor.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C bus driver for Conexant Digicolor SoCs
13 #include <linux/i2c.h>
23 #define II_CONTROL 0x0
24 #define II_CONTROL_LOCAL_RESET BIT(0)
26 #define II_CLOCKTIME 0x1
28 #define II_COMMAND 0x2
37 #define II_CMD_STATUS_NORMAL 0
42 #define II_DATA 0x3
43 #define II_INTFLAG_CLEAR 0x8
[all …]
Di2c-meson.c1 // SPDX-License-Identifier: GPL-2.0-only
3 * I2C bus driver for Amlogic Meson SoCs
11 #include <linux/i2c.h>
21 /* Meson I2C register map */
22 #define REG_CTRL 0x00
23 #define REG_SLAVE_ADDR 0x04
24 #define REG_TOK_LIST0 0x08
25 #define REG_TOK_LIST1 0x0c
26 #define REG_TOK_WDATA0 0x10
27 #define REG_TOK_WDATA1 0x14
[all …]
Di2c-synquacer.c1 // SPDX-License-Identifier: GPL-2.0
12 #include <linux/i2c.h>
25 /* I2C register address definitions */
26 #define SYNQUACER_I2C_REG_BSR (0x00 << 2) // Bus Status
27 #define SYNQUACER_I2C_REG_BCR (0x01 << 2) // Bus Control
28 #define SYNQUACER_I2C_REG_CCR (0x02 << 2) // Clock Control
29 #define SYNQUACER_I2C_REG_ADR (0x03 << 2) // Address
30 #define SYNQUACER_I2C_REG_DAR (0x04 << 2) // Data
31 #define SYNQUACER_I2C_REG_CSR (0x05 << 2) // Expansion CS
32 #define SYNQUACER_I2C_REG_FSR (0x06 << 2) // Bus Clock Freq
[all …]
Di2c-lpc2k.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Code portions referenced from the i2x-pxa and i2c-pnx drivers
17 #include <linux/i2c.h>
28 #define LPC24XX_I2CONSET 0x00
29 #define LPC24XX_I2STAT 0x04
30 #define LPC24XX_I2DAT 0x08
31 #define LPC24XX_I2ADDR 0x0c
32 #define LPC24XX_I2SCLH 0x10
33 #define LPC24XX_I2SCLL 0x14
34 #define LPC24XX_I2CONCLR 0x18
[all …]
Di2c-mpc.c1 // SPDX-License-Identifier: GPL-2.0
3 * This is a combined i2c adapter and algorithm driver for the
5 * the same I2C unit (8240, 8245, 85xx).
7 * Copyright (C) 2003-2004 Humboldt Solutions Ltd, adrian@humboldt.co.uk
25 #include <linux/i2c.h>
33 #define DRV_NAME "mpc-i2c"
35 #define MPC_I2C_CLOCK_LEGACY 0
36 #define MPC_I2C_CLOCK_PRESERVE (~0U)
38 #define MPC_I2C_FDR 0x04
39 #define MPC_I2C_CR 0x08
[all …]
/kernel/linux/linux-6.6/Documentation/i2c/
Di2c-sysfs.rst1 .. SPDX-License-Identifier: GPL-2.0
4 Linux I2C Sysfs
10 I2C topology can be complex because of the existence of I2C MUX
11 (I2C Multiplexer). The Linux
12 kernel abstracts the MUX channels into logical I2C bus numbers. However, there
13 is a gap of knowledge to map from the I2C bus physical number and MUX topology
14 to logical I2C bus number. This doc is aimed to fill in this gap, so the
16 the concept of logical I2C buses in the kernel, by knowing the physical I2C
17 topology and navigating through the I2C sysfs in Linux shell. This knowledge is
18 useful and essential to use ``i2c-tools`` for the purpose of development and
[all …]
/kernel/linux/linux-6.6/drivers/media/pci/netup_unidvb/
Dnetup_unidvb_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Internal I2C bus driver for NetUP Universal Dual DVB-CI
18 #define NETUP_I2C_BUS0_ADDR 0x4800
19 #define NETUP_I2C_BUS1_ADDR 0x4840
23 #define TWI_IRQEN_COMPL 0x1
24 #define TWI_IRQEN_ANACK 0x2
25 #define TWI_IRQEN_DNACK 0x4
29 #define TWI_IRQ_TX 0x800
30 #define TWI_IRQ_RX 0x1000
33 #define TWI_TRANSFER 0x100
[all …]
/kernel/linux/linux-5.10/drivers/media/pci/netup_unidvb/
Dnetup_unidvb_i2c.c1 // SPDX-License-Identifier: GPL-2.0-or-later
5 * Internal I2C bus driver for NetUP Universal Dual DVB-CI
18 #define NETUP_I2C_BUS0_ADDR 0x4800
19 #define NETUP_I2C_BUS1_ADDR 0x4840
23 #define TWI_IRQEN_COMPL 0x1
24 #define TWI_IRQEN_ANACK 0x2
25 #define TWI_IRQEN_DNACK 0x4
29 #define TWI_IRQ_TX 0x800
30 #define TWI_IRQ_RX 0x1000
33 #define TWI_TRANSFER 0x100
[all …]

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