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Searched refs:DDR_PHY_PHYDQRESULT (Results 1 – 6 of 6) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/ddr/hisilicon/default/
Dddr_phy_t16.h49 #define DDR_PHY_PHYDQRESULT 0x1D0 /* SW CA Training DQ result from PHY */ macro
Dddr_phy_t28.h48 #define DDR_PHY_PHYDQRESULT 0x1D0 /* SW CA Training DQ result from PHY */ macro
Dddr_phy_s28_v300.h51 #define DDR_PHY_PHYDQRESULT 0x1D0 /* SW CA Training DQ result from PHY */ macro
Dddr_phy_t12_v101.h51 #define DDR_PHY_PHYDQRESULT 0x1D0 /* SW CA Training DQ result from PHY */ macro
Dddr_phy_t12_v100.h51 #define DDR_PHY_PHYDQRESULT 0x1D0 /* SW CA Training DQ result from PHY */ macro
Dddr_training_impl.c3502 unsigned int dq_result = ddr_read(data->base_phy + DDR_PHY_PHYDQRESULT); in ddr_lpca_check()