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Searched refs:DDR_PHY_SWCATPATTERN_P (Results 1 – 6 of 6) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/ddr/hisilicon/default/
Dddr_phy_t16.h51 #define DDR_PHY_SWCATPATTERN_P 0x1D8 /* pattern for positive CK edge */ macro
Dddr_phy_t28.h50 #define DDR_PHY_SWCATPATTERN_P 0x1D8 /* pattern for positive CK edge */ macro
Dddr_phy_s28_v300.h53 #define DDR_PHY_SWCATPATTERN_P 0x1D8 /* pattern for positive CK edge */ macro
Dddr_phy_t12_v101.h53 #define DDR_PHY_SWCATPATTERN_P 0x1D8 /* pattern for positive CK edge */ macro
Dddr_phy_t12_v100.h53 #define DDR_PHY_SWCATPATTERN_P 0x1D8 /* pattern for positive CK edge */ macro
Dddr_training_impl.c3504 + DDR_PHY_SWCATPATTERN_P) & PHY_CAT_PATTERN_MASK; in ddr_lpca_check()