Home
last modified time | relevance | path

Searched refs:DDR_PHY_SWTWLDQS (Results 1 – 7 of 7) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/ddr/hisilicon/default/
Dddr_phy_s40.h32 #define DDR_PHY_SWTWLDQS 0xa4 macro
Dddr_phy_t16.h37 #define DDR_PHY_SWTWLDQS 0xa4 macro
Dddr_phy_t28.h35 #define DDR_PHY_SWTWLDQS 0xa4 macro
Dddr_phy_s28_v300.h38 #define DDR_PHY_SWTWLDQS 0xa4 macro
Dddr_phy_t12_v101.h38 #define DDR_PHY_SWTWLDQS 0xa4 macro
Dddr_phy_t12_v100.h38 #define DDR_PHY_SWTWLDQS 0xa4 macro
Dddr_training_impl.c2683 ddr_write(0x1, base_phy + DDR_PHY_SWTWLDQS); in ddr_wl_process()
2687 ddr_write(0x0, base_phy + DDR_PHY_SWTWLDQS); in ddr_wl_process()