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Searched refs:NUM_4 (Results 1 – 25 of 35) sorted by relevance

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/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3569v100/
Dlowlevel_init_v300.c178 unsigned int reg_val[NUM_4] = {0, 0, 0, 0}; in ddr_scramb()
179 unsigned int ddrc_isvalid[NUM_4] = {0, 0, 0, 0}; in ddr_scramb()
356 unsigned int core_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
357 unsigned int mda_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
358 unsigned int cpu_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
359 unsigned int gpu_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
397 *hpm_core = hpm_value_avg(core_value,NUM_4); in get_hpm_value()
398 *hpm_mda = hpm_value_avg(mda_value,NUM_4); in get_hpm_value()
399 *hpm_cpu = hpm_value_avg(cpu_value,NUM_4); in get_hpm_value()
400 *hpm_gpu = hpm_value_avg(gpu_value,NUM_4); in get_hpm_value()
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Dsdhci_boot.c64 buf += NUM_4; in sdhci_read_block_pio()
65 size -= NUM_4; in sdhci_read_block_pio()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv8/hi3559av100/
Dlowlevel_init_v300.c178 unsigned int reg_val[NUM_4] = {0, 0, 0, 0}; in ddr_scramb()
179 unsigned int ddrc_isvalid[NUM_4] = {0, 0, 0, 0}; in ddr_scramb()
356 unsigned int core_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
357 unsigned int mda_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
358 unsigned int cpu_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
359 unsigned int gpu_value[NUM_4] = {0, 0, 0, 0}; in get_hpm_value()
397 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
398 *hpm_mda = hpm_value_avg(mda_value, NUM_4); in get_hpm_value()
399 *hpm_cpu = hpm_value_avg(cpu_value, NUM_4); in get_hpm_value()
400 *hpm_gpu = hpm_value_avg(gpu_value, NUM_4); in get_hpm_value()
[all …]
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3556av100/
Dhisvb.c111 unsigned int core_value[NUM_4] = {0}; in get_hpm_value()
112 unsigned int mda_value[NUM_4] = {0}; in get_hpm_value()
113 unsigned int cpu_value[NUM_4] = {0}; in get_hpm_value()
144 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
145 *hpm_mda = hpm_value_avg(mda_value, NUM_4); in get_hpm_value()
146 *hpm_cpu = hpm_value_avg(cpu_value, NUM_4); in get_hpm_value()
Dhisvb.h41 #define NUM_4 4 macro
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3519av100/
Dlowlevel_init_v300.c311 unsigned int core_value[NUM_4]; in get_hpm_value()
312 unsigned int mda_value[NUM_4]; in get_hpm_value()
313 unsigned int cpu_value[NUM_4]; in get_hpm_value()
358 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
359 *hpm_mda = hpm_value_avg(mda_value, NUM_4); in get_hpm_value()
360 *hpm_cpu = hpm_value_avg(cpu_value, NUM_4); in get_hpm_value()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3518ev300/
Dpll_trainning.c333 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
335 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
451 regulator->steps[NUM_4] = regulator->curr - step_50; in svb_voltage_regulator_init()
453 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
468 if (regulator->steps[NUM_4] <= regulator->steps[NUM_5]) in svb_voltage_regulator_init()
471 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
472 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c159 unsigned int core_value[NUM_4]; in get_hpm_value()
175 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
236 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516ev200/
Dpll_trainning.c330 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
332 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
443 regulator->steps[NUM_4] = regulator->curr - step_50; in svb_voltage_regulator_init()
445 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
460 if (regulator->steps[NUM_4] <= regulator->steps[NUM_5]) in svb_voltage_regulator_init()
463 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
464 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c157 unsigned int core_value[NUM_4]; in get_hpm_value()
175 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
236 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516ev300/
Dpll_trainning.c357 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
359 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
470 regulator->steps[NUM_4] = regulator->curr - step_60; in svb_voltage_regulator_init()
472 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
487 if (regulator->steps[NUM_4] <= regulator->steps[NUM_5]) in svb_voltage_regulator_init()
490 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
491 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c153 unsigned int core_value[NUM_4]; in get_hpm_value()
171 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
232 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516dv200/
Dpll_trainning.c356 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
358 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
470 regulator->steps[NUM_4] = regulator->curr - step_60; in svb_voltage_regulator_init()
472 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
487 if (regulator->steps[NUM_4] <= regulator->steps[NUM_5]) in svb_voltage_regulator_init()
490 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
491 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c156 unsigned int core_value[NUM_4]; in get_hpm_value()
174 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
235 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516cv500/
Dpll_trainning.c372 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
374 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
508 regulator->steps[NUM_4] = regulator->curr - step_50; in svb_voltage_regulator_init()
510 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
512 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
513 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c271 unsigned int core_value[NUM_4]; in get_hpm_value()
290 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
407 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516dv300/
Dpll_trainning.c371 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
373 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
507 regulator->steps[NUM_4] = regulator->curr - step_50; in svb_voltage_regulator_init()
509 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
511 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
512 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c269 unsigned int core_value[NUM_4]; in get_hpm_value()
288 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
405 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/cpu/armv7/hi3516av300/
Dpll_trainning.c371 writel(DMA_RXCHNL_CONFIG + (dev->rx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
373 writel(DMA_TXCHNL_CONFIG + (dev->tx_dma_reqline_val << NUM_4), in do_uart_dma_rx_tst()
507 regulator->steps[NUM_4] = regulator->curr - step_50; in svb_voltage_regulator_init()
509 regulator->steps[NUM_4] = regulator->min; in svb_voltage_regulator_init()
511 if (regulator->steps[NUM_3] <= regulator->steps[NUM_4]) in svb_voltage_regulator_init()
512 regulator->steps[NUM_4] = 0xffffffff; in svb_voltage_regulator_init()
Dlowlevel_init_v300.c269 unsigned int core_value[NUM_4]; in get_hpm_value()
288 *hpm_core = hpm_value_avg(core_value, NUM_4); in get_hpm_value()
405 *hpm_core = *hpm_core - NUM_4; in adjust_hpm()
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516dv300/
Dplatform.h218 #define NUM_4 4 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516cv500/
Dplatform.h218 #define NUM_4 4 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516av300/
Dplatform.h218 #define NUM_4 4 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3516dv200/
Dplatform.h247 #define NUM_4 4 macro
/third_party/uboot/u-boot-2020.01/arch/arm/include/asm/arch-hi3518ev300/
Dplatform.h247 #define NUM_4 4 macro

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