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Searched refs:PHY_BDL_DQ2_BIT (Results 1 – 7 of 7) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/ddr/hisilicon/default/
Dddr_phy_s40.h145 #define PHY_BDL_DQ2_BIT 16 macro
Dddr_phy_t16.h166 #define PHY_BDL_DQ2_BIT 16 macro
Dddr_phy_t28.h166 #define PHY_BDL_DQ2_BIT 16 macro
Dddr_phy_s28_v300.h184 #define PHY_BDL_DQ2_BIT 16 macro
Dddr_phy_t12_v101.h160 #define PHY_BDL_DQ2_BIT 17 macro
Dddr_phy_t12_v100.h161 #define PHY_BDL_DQ2_BIT 17 macro
Dddr_training_impl.c670 bdl[2] = (dq03 >> PHY_BDL_DQ2_BIT) & PHY_BDL_MASK; in ddr_bdl_adj()
674 bdl[6] = (dq47 >> PHY_BDL_DQ2_BIT) & PHY_BDL_MASK; in ddr_bdl_adj()
685 ((bdl[2] - min) << PHY_BDL_DQ2_BIT) | ((bdl[3] - min) << PHY_BDL_DQ3_BIT); in ddr_bdl_adj()
687 ((bdl[6] - min) << PHY_BDL_DQ2_BIT) | ((bdl[7] - min) << PHY_BDL_DQ3_BIT); in ddr_bdl_adj()
921 + ((dq0_3 >> PHY_BDL_DQ2_BIT) & PHY_BDL_MASK) in ddr_adjust_get_average()
925 + ((dq4_7 >> PHY_BDL_DQ2_BIT) & PHY_BDL_MASK) in ddr_adjust_get_average()
2460 dq_bdl[2] = (tmp >> PHY_BDL_DQ2_BIT) & PHY_BDL_MASK; in ddr_dq_bdl_operate()
2470 tmp = (dq_bdl[3] << PHY_BDL_DQ3_BIT) + (dq_bdl[2] << PHY_BDL_DQ2_BIT) in ddr_dq_bdl_operate()