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Searched refs:PHY_OSC_RPT_VLD_MASK (Results 1 – 7 of 7) sorted by relevance

/third_party/uboot/u-boot-2020.01/drivers/ddr/hisilicon/default/
Dddr_phy_s40.h105 #define PHY_OSC_RPT_VLD_MASK 0x1 /* [15] */ macro
Dddr_phy_t16.h126 #define PHY_OSC_RPT_VLD_MASK 0x1 /* [15] */ macro
Dddr_phy_t28.h126 #define PHY_OSC_RPT_VLD_MASK 0x1 /* [15] */ macro
Dddr_phy_s28_v300.h138 #define PHY_OSC_RPT_VLD_MASK 0x1 /* [15] */ macro
Dddr_phy_t12_v101.h110 #define PHY_OSC_RPT_VLD_MASK 0x1 /* [15] */ macro
Dddr_phy_t12_v100.h111 #define PHY_OSC_RPT_VLD_MASK 0x1 /* [15] */ macro
Dddr_training_impl.c4323 >> PHY_OSC_RPT_VLD) & PHY_OSC_RPT_VLD_MASK; in ddr_pcode_trainig_by_phy()