Searched refs:SYSCTRL_DDR_HW_PHY1_RANK0 (Results 1 – 15 of 15) sorted by relevance
90 #define SYSCTRL_DDR_HW_PHY1_RANK0 0x98
91 #define SYSCTRL_DDR_HW_PHY1_RANK0 0x98
89 #define SYSCTRL_DDR_HW_PHY1_RANK0 0x98
85 #define SYSCTRL_DDR_HW_PHY1_RANK0 0x98 macro
79 #define SYSCTRL_DDR_HW_PHY1_RANK0 0x98 macro
81 #define SYSCTRL_DDR_HW_PHY1_RANK0 0x98 macro
178 cfg->phy[1].rank[0].item_hw = ddr_read(DDR_REG_BASE_SYSCTRL + SYSCTRL_DDR_HW_PHY1_RANK0); in ddr_training_cfg_set_rank()190 (DDR_REG_BASE_SYSCTRL + SYSCTRL_DDR_HW_PHY1_RANK0), cfg->phy[1].rank[0].item_hw, in ddr_training_cfg_set_rank()