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/external/elfutils/tests/
Drun-show-die-info.sh28 Offset : 11
29 CU offset : 11
38 Offset : 104
39 CU offset : 104
45 Offset : 127
46 CU offset : 127
52 Offset : 146
53 CU offset : 11
62 Offset : 239
63 CU offset : 104
[all …]
Drun-show-abbrev.sh25 abbrev[0]: attr[0]: code = 16, form = 6, offset = 0
26 abbrev[0]: attr[1]: code = 18, form = 1, offset = 2
27 abbrev[0]: attr[2]: code = 17, form = 1, offset = 4
28 abbrev[0]: attr[3]: code = 3, form = 8, offset = 6
29 abbrev[0]: attr[4]: code = 27, form = 8, offset = 8
30 abbrev[0]: attr[5]: code = 37, form = 8, offset = 10
31 abbrev[0]: attr[6]: code = 19, form = 11, offset = 12
33 abbrev[19]: attr[0]: code = 1, form = 19, offset = 19
34 abbrev[19]: attr[1]: code = 63, form = 12, offset = 21
35 abbrev[19]: attr[2]: code = 3, form = 8, offset = 23
[all …]
/external/u-boot/arch/x86/include/asm/arch-braswell/fsp/
Dfsp_vpd.h11 u64 signature; /* Offset 0x0020 */
12 u8 revision; /* Offset 0x0028 */
13 u8 unused2[7]; /* Offset 0x0029 */
14 u16 mrc_init_tseg_size; /* Offset 0x0030 */
15 u16 mrc_init_mmio_size; /* Offset 0x0032 */
16 u8 mrc_init_spd_addr1; /* Offset 0x0034 */
17 u8 mrc_init_spd_addr2; /* Offset 0x0035 */
18 u8 mem_ch0_config; /* Offset 0x0036 */
19 u8 mem_ch1_config; /* Offset 0x0037 */
20 u32 memory_spd_ptr; /* Offset 0x0038 */
[all …]
/external/u-boot/board/siemens/draco/
Dmux.c22 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
23 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
28 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
29 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
34 {OFFSET(i2c0_sda), (MODE(0) | RXACTIVE |
36 {OFFSET(i2c0_scl), (MODE(0) | RXACTIVE |
42 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
43 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
44 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
45 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
[all …]
/external/u-boot/board/siemens/rut/
Dmux.c22 {OFFSET(uart0_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART0_RXD */
23 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */
28 {OFFSET(ddr_resetn), (MODE(0))},
29 {OFFSET(ddr_csn0), (MODE(0) | PULLUP_EN)},
30 {OFFSET(ddr_ck), (MODE(0))},
31 {OFFSET(ddr_nck), (MODE(0))},
32 {OFFSET(ddr_casn), (MODE(0) | PULLUP_EN)},
33 {OFFSET(ddr_rasn), (MODE(0) | PULLUP_EN)},
34 {OFFSET(ddr_wen), (MODE(0) | PULLUP_EN)},
35 {OFFSET(ddr_ba0), (MODE(0) | PULLUP_EN)},
[all …]
/external/u-boot/arch/arm/include/asm/arch-am33xx/
Dcpu.h80 unsigned int wkclkstctrl; /* offset 0x00 */
81 unsigned int wkctrlclkctrl; /* offset 0x04 */
82 unsigned int wkgpio0clkctrl; /* offset 0x08 */
83 unsigned int wkl4wkclkctrl; /* offset 0x0c */
84 unsigned int timer0clkctrl; /* offset 0x10 */
86 unsigned int idlestdpllmpu; /* offset 0x20 */
89 unsigned int clkseldpllmpu; /* offset 0x2c */
91 unsigned int idlestdpllddr; /* offset 0x34 */
93 unsigned int clkseldpllddr; /* offset 0x40 */
95 unsigned int clkseldplldisp; /* offset 0x54 */
[all …]
/external/u-boot/arch/arm/include/asm/arch-tegra/
Dpmc.h12 uint pmc_cntrl; /* _CNTRL_0, offset 00 */
13 uint pmc_sec_disable; /* _SEC_DISABLE_0, offset 04 */
14 uint pmc_pmc_swrst; /* _PMC_SWRST_0, offset 08 */
15 uint pmc_wake_mask; /* _WAKE_MASK_0, offset 0C */
16 uint pmc_wake_lvl; /* _WAKE_LVL_0, offset 10 */
17 uint pmc_wake_status; /* _WAKE_STATUS_0, offset 14 */
18 uint pmc_sw_wake_status; /* _SW_WAKE_STATUS_0, offset 18 */
19 uint pmc_dpd_pads_oride; /* _DPD_PADS_ORIDE_0, offset 1C */
20 uint pmc_dpd_sample; /* _DPD_PADS_SAMPLE_0, offset 20 */
21 uint pmc_dpd_enable; /* _DPD_PADS_ENABLE_0, offset 24 */
[all …]
/external/u-boot/arch/arm/include/asm/arch-meson/
Dclock.h16 #define SCR 0x2C /* 0x0b offset in data sheet */
17 #define TIMEOUT_VALUE 0x3c /* 0x0f offset in data sheet */
19 #define HHI_GP0_PLL_CNTL 0x40 /* 0x10 offset in data sheet */
20 #define HHI_GP0_PLL_CNTL2 0x44 /* 0x11 offset in data sheet */
21 #define HHI_GP0_PLL_CNTL3 0x48 /* 0x12 offset in data sheet */
22 #define HHI_GP0_PLL_CNTL4 0x4c /* 0x13 offset in data sheet */
23 #define HHI_GP0_PLL_CNTL5 0x50 /* 0x14 offset in data sheet */
24 #define HHI_GP0_PLL_CNTL1 0x58 /* 0x16 offset in data sheet */
26 #define HHI_XTAL_DIVN_CNTL 0xbc /* 0x2f offset in data sheet */
27 #define HHI_TIMER90K 0xec /* 0x3b offset in data sheet */
[all …]
/external/v8/src/objects/
Dobject-macros.h56 #define INT_ACCESSORS(holder, name, offset) \ argument
57 int holder::name() const { return READ_INT_FIELD(this, offset); } \
58 void holder::set_##name(int value) { WRITE_INT_FIELD(this, offset, value); }
60 #define INT32_ACCESSORS(holder, name, offset) \ argument
61 int32_t holder::name() const { return READ_INT32_FIELD(this, offset); } \
63 WRITE_INT32_FIELD(this, offset, value); \
66 #define UINT16_ACCESSORS(holder, name, offset) \ argument
67 uint16_t holder::name() const { return READ_UINT16_FIELD(this, offset); } \
71 WRITE_UINT16_FIELD(this, offset, value); \
74 #define UINT8_ACCESSORS(holder, name, offset) \ argument
[all …]
/external/u-boot/arch/x86/include/asm/arch-baytrail/fsp/
Dfsp_vpd.h31 uint64_t signature; /* Offset 0x0000 */
32 uint8_t reserved0[24]; /* Offset 0x0008 */
33 uint16_t mrc_init_tseg_size; /* Offset 0x0020 */
34 uint16_t mrc_init_mmio_size; /* Offset 0x0022 */
35 uint8_t mrc_init_spd_addr1; /* Offset 0x0024 */
36 uint8_t mrc_init_spd_addr2; /* Offset 0x0025 */
37 uint8_t emmc_boot_mode; /* Offset 0x0026 */
38 uint8_t enable_sdio; /* Offset 0x0027 */
39 uint8_t enable_sdcard; /* Offset 0x0028 */
40 uint8_t enable_hsuart0; /* Offset 0x0029 */
[all …]
/external/flatbuffers/tests/
Dmonster_test_generated.ts83 * @returns flatbuffers.Offset
85 static endInParentNamespace(builder:flatbuffers.Builder):flatbuffers.Offset {
86 var offset = builder.endObject();
87 return offset;
90 static createInParentNamespace(builder:flatbuffers.Builder):flatbuffers.Offset {
133 * @returns flatbuffers.Offset
135 static endMonster(builder:flatbuffers.Builder):flatbuffers.Offset {
136 var offset = builder.endObject();
137 return offset;
140 static createMonster(builder:flatbuffers.Builder):flatbuffers.Offset {
[all …]
/external/u-boot/board/bosch/shc/
Dmux.c21 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_RXD */
22 {OFFSET(uart0_txd), (MODE(0) | PULLUDDIS)}, /* UART0_TXD */
23 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART0_CTS */
24 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDDIS)}, /* UART0_RTS */
29 {OFFSET(uart1_rxd), (MODE(0) | PULLUDDIS | RXACTIVE)}, /* UART1_RXD */
30 {OFFSET(uart1_txd), (MODE(0) | PULLUDDIS)}, /* UART1_TXD */
31 {OFFSET(uart1_ctsn), (MODE(0) | PULLUDEN | RXACTIVE)}, /* UART1_CTS */
32 {OFFSET(uart1_rtsn), (MODE(0) | PULLUDDIS)}, /* UART1_RTS */
37 {OFFSET(spi0_sclk), (MODE(1) | PULLUDDIS | RXACTIVE)}, /* UART2_RXD */
38 {OFFSET(spi0_d0), (MODE(1) | PULLUDDIS)}, /* UART2_TXD */
[all …]
/external/libnetfilter_conntrack/src/expect/
Dsnprintf_xml.c57 unsigned int size = 0, offset = 0; in snprintf_expect_meta_xml() local
60 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
63 ret = snprintf(buf+offset, len, in snprintf_expect_meta_xml()
66 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
69 ret = snprintf(buf+offset, len, "<timeout>%u</timeout>", in snprintf_expect_meta_xml()
71 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
74 ret = snprintf(buf+offset, len, "<class>%u</class>", in snprintf_expect_meta_xml()
76 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
79 ret = snprintf(buf+offset, len, "<zone>%u</zone>", exp->zone); in snprintf_expect_meta_xml()
80 BUFFER_SIZE(ret, size, len, offset); in snprintf_expect_meta_xml()
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/unittests/Support/
DDataExtractorTest.cpp28 uint32_t offset = 0; in TEST() local
30 EXPECT_EQ(0x80U, DE.getU8(&offset)); in TEST()
31 EXPECT_EQ(1U, offset); in TEST()
32 offset = 0; in TEST()
33 EXPECT_EQ(0x8090U, DE.getU16(&offset)); in TEST()
34 EXPECT_EQ(2U, offset); in TEST()
35 offset = 0; in TEST()
36 EXPECT_EQ(0x8090FFFFU, DE.getU32(&offset)); in TEST()
37 EXPECT_EQ(4U, offset); in TEST()
38 offset = 0; in TEST()
[all …]
/external/llvm/unittests/Support/
DDataExtractorTest.cpp28 uint32_t offset = 0; in TEST() local
30 EXPECT_EQ(0x80U, DE.getU8(&offset)); in TEST()
31 EXPECT_EQ(1U, offset); in TEST()
32 offset = 0; in TEST()
33 EXPECT_EQ(0x8090U, DE.getU16(&offset)); in TEST()
34 EXPECT_EQ(2U, offset); in TEST()
35 offset = 0; in TEST()
36 EXPECT_EQ(0x8090FFFFU, DE.getU32(&offset)); in TEST()
37 EXPECT_EQ(4U, offset); in TEST()
38 offset = 0; in TEST()
[all …]
/external/u-boot/board/BuR/brppt1/
Dmux.c20 {OFFSET(uart0_rtsn), (MODE(0) | PULLUDEN)},
22 {OFFSET(uart0_ctsn), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
24 {OFFSET(uart0_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
26 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)},
31 {OFFSET(uart1_rtsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)},
33 {OFFSET(uart1_ctsn), (MODE(3) | PULLUDEN | PULLUP_EN | RXACTIVE)},
35 {OFFSET(uart1_rxd), (MODE(0) | PULLUDEN | PULLUP_EN | RXACTIVE)},
37 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)},
42 {OFFSET(gpmc_ad7), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT7 */
43 {OFFSET(gpmc_ad6), (MODE(1) | RXACTIVE | PULLUP_EN)}, /* MMC1_DAT6 */
[all …]
/external/swiftshader/third_party/llvm-7.0/llvm/test/tools/llvm-pdbdump/
Dexplain-dbi-stream.test2 ; RUN: -offset=0xF000 \
3 ; RUN: -offset=0xF004 \
4 ; RUN: -offset=0xF008 \
5 ; RUN: -offset=0xF00C \
6 ; RUN: -offset=0xF00E \
7 ; RUN: -offset=0xF010 \
8 ; RUN: -offset=0xF012 \
9 ; RUN: -offset=0xF014 \
10 ; RUN: -offset=0xF016 \
11 ; RUN: -offset=0xF018 \
[all …]
/external/u-boot/arch/arm/include/asm/arch-tegra124/
Dmc.h13 u32 reserved0[4]; /* offset 0x00 - 0x0C */
14 u32 mc_smmu_config; /* offset 0x10 */
15 u32 mc_smmu_tlb_config; /* offset 0x14 */
16 u32 mc_smmu_ptc_config; /* offset 0x18 */
17 u32 mc_smmu_ptb_asid; /* offset 0x1C */
18 u32 mc_smmu_ptb_data; /* offset 0x20 */
19 u32 reserved1[3]; /* offset 0x24 - 0x2C */
20 u32 mc_smmu_tlb_flush; /* offset 0x30 */
21 u32 mc_smmu_ptc_flush; /* offset 0x34 */
22 u32 reserved2[6]; /* offset 0x38 - 0x4C */
[all …]
/external/u-boot/arch/arm/include/asm/arch-tegra210/
Dmc.h13 u32 reserved0[4]; /* offset 0x00 - 0x0C */
14 u32 mc_smmu_config; /* offset 0x10 */
15 u32 mc_smmu_tlb_config; /* offset 0x14 */
16 u32 mc_smmu_ptc_config; /* offset 0x18 */
17 u32 mc_smmu_ptb_asid; /* offset 0x1C */
18 u32 mc_smmu_ptb_data; /* offset 0x20 */
19 u32 reserved1[3]; /* offset 0x24 - 0x2C */
20 u32 mc_smmu_tlb_flush; /* offset 0x30 */
21 u32 mc_smmu_ptc_flush; /* offset 0x34 */
22 u32 reserved2[6]; /* offset 0x38 - 0x4C */
[all …]
/external/u-boot/board/siemens/pxm2/
Dmux.c23 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
24 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
25 {OFFSET(nnmi), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_TXD */
31 {OFFSET(gpmc_ad0), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD0 */
32 {OFFSET(gpmc_ad1), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD1 */
33 {OFFSET(gpmc_ad2), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD2 */
34 {OFFSET(gpmc_ad3), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD3 */
35 {OFFSET(gpmc_ad4), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD4 */
36 {OFFSET(gpmc_ad5), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD5 */
37 {OFFSET(gpmc_ad6), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* NAND AD6 */
[all …]
/external/u-boot/board/ti/am335x/
Dmux.c26 {OFFSET(uart0_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART0_RXD */
27 {OFFSET(uart0_txd), (MODE(0) | PULLUDEN)}, /* UART0_TXD */
32 {OFFSET(uart1_rxd), (MODE(0) | PULLUP_EN | RXACTIVE)}, /* UART1_RXD */
33 {OFFSET(uart1_txd), (MODE(0) | PULLUDEN)}, /* UART1_TXD */
38 {OFFSET(spi0_sclk), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART2_RXD */
39 {OFFSET(spi0_d0), (MODE(1) | PULLUDEN)}, /* UART2_TXD */
44 {OFFSET(spi0_cs1), (MODE(1) | PULLUP_EN | RXACTIVE)}, /* UART3_RXD */
45 {OFFSET(ecap0_in_pwm0_out), (MODE(1) | PULLUDEN)}, /* UART3_TXD */
50 {OFFSET(gpmc_wait0), (MODE(6) | PULLUP_EN | RXACTIVE)}, /* UART4_RXD */
51 {OFFSET(gpmc_wpn), (MODE(6) | PULLUDEN)}, /* UART4_TXD */
[all …]
/external/vixl/test/aarch32/
Dtest-assembler-cond-rd-memop-immediate-8192-a32.cc73 int32_t offset; member
100 const TestData kTests[] = {{{pl, r13, r0, plus, 0, Offset},
103 "pl r13 r0 plus 0 Offset",
105 {{ge, r5, r3, plus, 0, Offset},
108 "ge r5 r3 plus 0 Offset",
110 {{cc, r0, r4, plus, 0, Offset},
113 "cc r0 r4 plus 0 Offset",
115 {{ge, r0, r0, plus, 0, Offset},
118 "ge r0 r0 plus 0 Offset",
120 {{eq, r12, r3, plus, 0, Offset},
[all …]
Dtest-assembler-cond-rd-memop-immediate-512-a32.cc73 int32_t offset; member
100 const TestData kTests[] = {{{pl, r13, r0, plus, 0, Offset},
103 "pl r13 r0 plus 0 Offset",
105 {{ge, r5, r3, plus, 0, Offset},
108 "ge r5 r3 plus 0 Offset",
110 {{cc, r0, r4, plus, 0, Offset},
113 "cc r0 r4 plus 0 Offset",
115 {{ge, r0, r0, plus, 0, Offset},
118 "ge r0 r0 plus 0 Offset",
120 {{eq, r12, r3, plus, 0, Offset},
[all …]
Dtest-assembler-cond-rd-memop-rs-a32.cc104 const TestData kTests[] = {{{pl, r8, r11, plus, r6, Offset},
107 "pl r8 r11 plus r6 Offset",
109 {{le, r4, r8, plus, r5, Offset},
112 "le r4 r8 plus r5 Offset",
114 {{vs, r2, r6, plus, r14, Offset},
117 "vs r2 r6 plus r14 Offset",
119 {{ls, r1, r7, plus, r8, Offset},
122 "ls r1 r7 plus r8 Offset",
124 {{ge, r14, r6, plus, r14, Offset},
127 "ge r14 r6 plus r14 Offset",
[all …]
/external/swiftshader/third_party/LLVM/unittests/Support/
DDataExtractorTest.cpp27 uint32_t offset = 0; in TEST() local
29 EXPECT_EQ(0x80U, DE.getU8(&offset)); in TEST()
30 EXPECT_EQ(1U, offset); in TEST()
31 offset = 0; in TEST()
32 EXPECT_EQ(0x8090U, DE.getU16(&offset)); in TEST()
33 EXPECT_EQ(2U, offset); in TEST()
34 offset = 0; in TEST()
35 EXPECT_EQ(0x8090FFFFU, DE.getU32(&offset)); in TEST()
36 EXPECT_EQ(4U, offset); in TEST()
37 offset = 0; in TEST()
[all …]

12345678910>>...443