/external/llvm/lib/Target/X86/ |
D | X86RegisterInfo.cpp | 72 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo() 77 BasePtr = X86::ESI; in X86RegisterInfo() 462 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() local 463 for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true); in getReservedRegs() 563 return MRI->canReserveReg(BasePtr); in canRealignStack() 582 unsigned BasePtr; in eliminateFrameIndex() local 589 BasePtr = (FrameIndex < 0 ? FramePtr : getBaseRegister()); in eliminateFrameIndex() 591 BasePtr = (FrameIndex < 0 ? FramePtr : StackPtr); in eliminateFrameIndex() 593 BasePtr = StackPtr; in eliminateFrameIndex() 595 BasePtr = (TFI->hasFP(MF) ? FramePtr : StackPtr); in eliminateFrameIndex() [all …]
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D | X86RegisterInfo.h | 50 unsigned BasePtr; variable 135 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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/external/llvm/lib/Target/SystemZ/ |
D | SystemZRegisterInfo.cpp | 80 unsigned BasePtr; in eliminateFrameIndex() local 81 int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) + in eliminateFrameIndex() 86 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); in eliminateFrameIndex() 101 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 124 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 132 .addReg(BasePtr).addImm(HighOffset).addReg(0); in eliminateFrameIndex() 138 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr); in eliminateFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/X86/ |
D | X86RegisterInfo.cpp | 67 BasePtr = Use64BitReg ? X86::RBX : X86::EBX; in X86RegisterInfo() 72 BasePtr = X86::ESI; in X86RegisterInfo() 529 unsigned BasePtr = getX86SubSuperRegister(getBaseRegister(), 64); in getReservedRegs() local 530 for (MCSubRegIterator I(BasePtr, this, /*IncludeSelf=*/true); in getReservedRegs() 637 return MRI->canReserveReg(BasePtr); in canRealignStack() 662 unsigned BasePtr = MI.getOperand(1).getReg(); in tryOptimizeLEAtoMOV() local 667 BasePtr = getX86SubSuperRegister(BasePtr, 32); in tryOptimizeLEAtoMOV() 671 TII->copyPhysReg(*MI.getParent(), II, MI.getDebugLoc(), NewDestReg, BasePtr, in tryOptimizeLEAtoMOV() 688 unsigned BasePtr; in eliminateFrameIndex() local 693 FIOffset = TFI->getFrameIndexReferenceSP(MF, FrameIndex, BasePtr, 0); in eliminateFrameIndex() [all …]
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D | X86RegisterInfo.h | 50 unsigned BasePtr; variable 135 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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/external/llvm/lib/Target/PowerPC/ |
D | PPCLoopPreIncPrep.cpp | 123 static bool IsPtrInBounds(Value *BasePtr) { in IsPtrInBounds() argument 124 Value *StrippedBasePtr = BasePtr; in IsPtrInBounds() 314 Value *BasePtr = GetPointerOperand(MemI); in runOnLoop() local 315 assert(BasePtr && "No pointer operand"); in runOnLoop() 319 BasePtr->getType()->getPointerAddressSpace()); in runOnLoop() 357 PtrInc->setIsInBounds(IsPtrInBounds(BasePtr)); in runOnLoop() 367 if (PtrInc->getType() != BasePtr->getType()) in runOnLoop() 368 NewBasePtr = new BitCastInst(PtrInc, BasePtr->getType(), in runOnLoop() 373 if (Instruction *IDel = dyn_cast<Instruction>(BasePtr)) in runOnLoop() 375 BasePtr->replaceAllUsesWith(NewBasePtr); in runOnLoop() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/PowerPC/ |
D | PPCLoopPreIncPrep.cpp | 145 static bool IsPtrInBounds(Value *BasePtr) { in IsPtrInBounds() argument 146 Value *StrippedBasePtr = BasePtr; in IsPtrInBounds() 404 Value *BasePtr = GetPointerOperand(MemI); in runOnLoop() local 405 assert(BasePtr && "No pointer operand"); in runOnLoop() 409 BasePtr->getType()->getPointerAddressSpace()); in runOnLoop() 450 PtrInc->setIsInBounds(IsPtrInBounds(BasePtr)); in runOnLoop() 460 if (PtrInc->getType() != BasePtr->getType()) in runOnLoop() 461 NewBasePtr = new BitCastInst(PtrInc, BasePtr->getType(), in runOnLoop() 466 if (Instruction *IDel = dyn_cast<Instruction>(BasePtr)) in runOnLoop() 468 BasePtr->replaceAllUsesWith(NewBasePtr); in runOnLoop() [all …]
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/SystemZ/ |
D | SystemZRegisterInfo.cpp | 177 unsigned BasePtr; in eliminateFrameIndex() local 178 int64_t Offset = (TFI->getFrameIndexReference(MF, FrameIndex, BasePtr) + in eliminateFrameIndex() 183 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, /*isDef*/ false); in eliminateFrameIndex() 198 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 221 MI->getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 229 .addReg(BasePtr).addImm(HighOffset).addReg(0); in eliminateFrameIndex() 235 .addReg(ScratchReg, RegState::Kill).addReg(BasePtr); in eliminateFrameIndex()
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/external/webrtc/webrtc/voice_engine/test/auto_test/ |
D | voe_stress_test.cc | 120 VoEBase* base = _mgr.BasePtr(); in StartStopTest() 195 VoEBase* base = _mgr.BasePtr(); in CreateDeleteChannelsTest() 305 VoEBase* base = _mgr.BasePtr(); in MultipleThreadsTest() 388 VoEBase* base = _mgr.BasePtr(); in ProcessExtraApi()
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D | voe_output_test.cc | 80 VoEBase* base = manager_.BasePtr(); in OutputTest() 117 VoEBase* base = manager_.BasePtr(); in Start()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/CodeGen/ |
D | ShadowStackGCLowering.cpp | 79 Type *Ty, Value *BasePtr, int Idx1, 82 Type *Ty, Value *BasePtr, int Idx1, int Idx2, 258 Value *BasePtr, int Idx, in CreateGEP() argument 264 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP() 272 IRBuilder<> &B, Type *Ty, Value *BasePtr, in CreateGEP() argument 276 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/ |
D | ShadowStackGC.cpp | 67 IRBuilder<> &B, Value *BasePtr, 70 IRBuilder<> &B, Value *BasePtr, 350 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, in CreateGEP() argument 355 Value* Val = B.CreateGEP(BasePtr, Indices, Name); in CreateGEP() 363 ShadowStackGC::CreateGEP(LLVMContext &Context, IRBuilder<> &B, Value *BasePtr, in CreateGEP() argument 367 Value *Val = B.CreateGEP(BasePtr, Indices, Name); in CreateGEP()
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/external/llvm/lib/CodeGen/ |
D | ShadowStackGCLowering.cpp | 60 Type *Ty, Value *BasePtr, int Idx1, 63 Type *Ty, Value *BasePtr, int Idx1, int Idx2, 355 Value *BasePtr, int Idx, in CreateGEP() argument 361 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP() 369 IRBuilder<> &B, Type *Ty, Value *BasePtr, in CreateGEP() argument 373 Value *Val = B.CreateGEP(Ty, BasePtr, Indices, Name); in CreateGEP()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/AVR/ |
D | AVRISelDAGToDAG.cpp | 328 SDValue BasePtr = ST->getBasePtr(); in select() local 331 if (isa<FrameIndexSDNode>(BasePtr) || isa<ConstantSDNode>(BasePtr) || in select() 332 BasePtr.isUndef()) { in select() 336 const RegisterSDNode *RN = dyn_cast<RegisterSDNode>(BasePtr.getOperand(0)); in select() 342 int CST = (int)cast<ConstantSDNode>(BasePtr.getOperand(1))->getZExtValue(); in select() 347 SDValue Ops[] = {BasePtr.getOperand(0), Offset, ST->getValue(), Chain}; in select()
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/external/llvm/lib/Target/MSP430/ |
D | MSP430RegisterInfo.cpp | 116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP); in eliminateFrameIndex() local 137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/MSP430/ |
D | MSP430RegisterInfo.cpp | 116 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FP : MSP430::SP); in eliminateFrameIndex() local 137 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 154 MI.getOperand(FIOperandNum).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
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/external/mesa3d/src/gallium/drivers/swr/rasterizer/jitter/ |
D | builder_misc.h | 104 LoadInst *LOAD(Value *BasePtr, const std::initializer_list<uint32_t> &offset, const llvm::Twine& na… 105 LoadInst *LOADV(Value *BasePtr, const std::initializer_list<Value*> &offset, const llvm::Twine& nam… 106 StoreInst *STORE(Value *Val, Value *BasePtr, const std::initializer_list<uint32_t> &offset); 107 StoreInst *STOREV(Value *Val, Value *BasePtr, const std::initializer_list<Value*> &offset);
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/external/swiftshader/third_party/LLVM/lib/Transforms/Scalar/ |
D | LoopIdiomRecognize.cpp | 483 Value *BasePtr = in processLoopStridedStore() local 488 if (mayLoopAccessLocation(BasePtr, AliasAnalysis::ModRef, in processLoopStridedStore() 493 deleteIfDeadInstruction(BasePtr, *SE); in processLoopStridedStore() 515 NewCall = Builder.CreateMemSet(BasePtr, SplatValue,NumBytes,StoreAlignment); in processLoopStridedStore() 532 NewCall = Builder.CreateCall3(MSP, BasePtr, PatternPtr, NumBytes); in processLoopStridedStore()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/WebAssembly/ |
D | WebAssemblyFrameLowering.cpp | 161 unsigned BasePtr = MRI.createVirtualRegister(PtrRC); in emitPrologue() local 162 FI->setBasePointerVreg(BasePtr); in emitPrologue() 163 BuildMI(MBB, InsertPt, DL, TII->get(WebAssembly::COPY), BasePtr) in emitPrologue()
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/external/swiftshader/third_party/LLVM/lib/Target/SystemZ/ |
D | SystemZRegisterInfo.cpp | 111 unsigned BasePtr = (TFI->hasFP(MF) ? SystemZ::R11D : SystemZ::R15D); in eliminateFrameIndex() local 116 MI.getOperand(i).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
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/external/swiftshader/third_party/LLVM/lib/Target/MSP430/ |
D | MSP430RegisterInfo.cpp | 181 unsigned BasePtr = (TFI->hasFP(MF) ? MSP430::FPW : MSP430::SPW); in eliminateFrameIndex() local 201 MI.getOperand(i).ChangeToRegister(BasePtr, false); in eliminateFrameIndex() 218 MI.getOperand(i).ChangeToRegister(BasePtr, false); in eliminateFrameIndex()
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/external/swiftshader/third_party/LLVM/lib/Target/ARM/ |
D | ARMBaseRegisterInfo.h | 86 unsigned BasePtr; variable 157 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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/external/llvm/lib/Target/ARM/ |
D | ARMBaseRegisterInfo.h | 90 unsigned BasePtr; 162 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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/external/swiftshader/third_party/llvm-7.0/llvm/lib/Target/ARM/ |
D | ARMBaseRegisterInfo.h | 103 unsigned BasePtr = ARM::R6; 177 unsigned getBaseRegister() const { return BasePtr; } in getBaseRegister()
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/external/swiftshader/third_party/LLVM/lib/CodeGen/SelectionDAG/ |
D | LegalizeVectorTypes.cpp | 2275 SDValue BasePtr = LD->getBasePtr(); in GenWidenVectorLoads() local 2287 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, LD->getPointerInfo(), in GenWidenVectorLoads() 2323 BasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), BasePtr, in GenWidenVectorLoads() 2332 SDValue LdOp = DAG.getLoad(NewVT, dl, Chain, BasePtr, in GenWidenVectorLoads() 2408 SDValue BasePtr = LD->getBasePtr(); in GenWidenVectorExtLoads() local 2421 Ops[0] = DAG.getExtLoad(ExtType, dl, EltVT, Chain, BasePtr, in GenWidenVectorExtLoads() 2427 SDValue NewBasePtr = DAG.getNode(ISD::ADD, dl, BasePtr.getValueType(), in GenWidenVectorExtLoads() 2428 BasePtr, DAG.getIntPtrConstant(Offset)); in GenWidenVectorExtLoads() 2450 SDValue BasePtr = ST->getBasePtr(); in GenWidenVectorStores() local 2477 StChain.push_back(DAG.getStore(Chain, dl, EOp, BasePtr, in GenWidenVectorStores() [all …]
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